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STK672-340-E Scheda tecnica(PDF) 4 Page - Sanyo Semicon Device |
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STK672-340-E Scheda tecnica(HTML) 4 Page - Sanyo Semicon Device |
4 / 13 page STK672-340-E No.A1254-4/13 Sample Application Circuit • To minimize noise in the 5V system, locate the ground side of capacitor CO2 in the above circuit as close as possible to pin 1 of the IC. Also, if at all possible, the ground used for Vref must not be common to the P.GND pattern, but must be directly wired from pin 1. • Insert resistor RO3 (47 to 100Ω) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6V (when If = 0.1A), this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short without problem. • Apply 2.5V High level input to pins 8, 9, 10, 11, and 12. • Since the input pins do not have built-in pull-up resistors, when the open-collector type pins 8, 9, 10, 11, and 12 are used as inputs, a 10 to 47k Ω pull-up resistor (to VDD) must be used. • To prevent incorrect operation due to chopping noise, we recommend inserting 470 to 1000pF capacitors between pin 1 and each of the pins 8, 9, 10, and 12. (With the open-collector type IC, we also recommend inserting a 470 to 1000pF capacitor between pin 11 (RESETB) and pin 1 when pin 11 is used as an input.) • The following circuit (for a lowered current of over 0.2A) is recommended if the application needs to temporarily lower the motor current. Here, a value of close to 100k Ω must be used for resistor RO1 to make the transistor output saturation voltage as low as possible. 5V RO1 RO2 RO3 Vref 5V RO1 RO2 RO3 Vref ITF02172 ITF02171 VDD=5V CLOCK MODE CWB 5V 5V RESETB 6 9 8 10 11 7 ENABLE 12 D1 RO3 RO4 20k Ω CO4 10 μF RO1 Vref RO2 0.1 μF CO1 CO3 + + + 10 μF 5 A 4 AB 3 B 2 BB 1 GND STK672-340-E CO2 At least 100 μF VCC 24V P.GND ITF02170 2-phase stepping motor |
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