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FAN5340UCX Scheda tecnica(PDF) 5 Page - Fairchild Semiconductor |
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FAN5340UCX Scheda tecnica(HTML) 5 Page - Fairchild Semiconductor |
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5 / 12 page  © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5340 • Rev. 1.0.1 5 Electrical Specifications VIN = 2.7V to 4.8V and TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = 25°C and VIN = 3.6V. Symbol Parameter Conditions Min. Typ. Max. Units Power Supplies IQ Quiescent Current EN = VIN, Device Not Switching 1 mA ISD Shutdown Supply Current EN = GND, VIN = 3.6V 0.3 1.0 μA VUVLO Under-Voltage Lockout VIN Rising 2.30 2.40 2.50 V VIN Falling 2.00 2.15 2.25 V VUVHYST Under-Voltage Lockout Hysteresis 250 mV EN: Enable Pin VIH HIGH-Level Input Voltage 1.2 V VIL LOW-Level Input Voltage 0.4 V REN EN Pull-Down Resistance 200 300 400 k Ω tSD EN Low to Shutdown Delay From Falling Edge of EN 20 80 ms Feedback and Reference VFB Feedback Voltage 480 500 520 mV IFB Feedback Input Current VFB = 500mV 0.1 1.0 μA Power Outputs RDS(ON)_Q1 Boost Switch On-Resistance VIN = 3.6V, VOUT = 10V, ISW = 100mA 600 m Ω VIN = 2.7V, VOUT = 10V, ISW = 100mA 850 RDS(ON)_Q2 Synchronous Rectifier On-Resistance VOUT = 10V, ISW = 100mA 2.0 Ω RDS(ON)_Q3 Load Switch On-Resistance VOUT = 10V, ILED = 10mA 2.8 Ω ISW(OFF) SW Node Leakage (2) EN = 0, VIN = VSW = VOUT = 5.5V, VLED = 0 0.1 1.0 μA ILIM-PK Boost Switch Peak Current Limit VIN = 3.6V 325 400 475 mA Oscillator fSW Boost Regulator Switching Frequency 1.0 1.2 1.4 MHz PWM Dimming DPWM PWM Duty Cycle (3) PWM Dimming Frequency ≤1kHz 1.0 100 % Output and Protection VOVP Boost Output Over-Voltage Protection 18.0 19.0 20.0 V VOVPHYST OVP Hysteresis 0.8 V VTHSC VLED Short-Circuit Detection Threshold VOUT Falling VIN – 1.5 V VOUT Rising VIN – 1.3 V DMAX Maximum Boost Duty Cycle (3) 85 % DMIN Minimum Boost Duty Cycle (3) 20 % TSD Thermal Shutdown 150 °C THYS Thermal Shutdown Hysteresis 25 °C Notes: 2. SW leakage current includes the leakage current of three internal switches; SW to GND, VOUT to VLED, and SW to VOUT. 3. Guaranteed by design. |
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