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CXA3017R Scheda tecnica(PDF) 3 Page - Sony Corporation |
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CXA3017R Scheda tecnica(HTML) 3 Page - Sony Corporation |
3 / 83 page – 3 – CXA3017R Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 EXT R EXT G EXT B TRAP VDD1 LOAD DATA SCLK RPD TEST1 BLK CLR HST2 HST1 XHST1 VSS HCK2 HCK1 XPCG PCG HD XVST VST VCK4 VCK3 VCK2 VCK1 XEN1 EN1 EN2 VD DA OUT VDD2 DWN Symbol L I I I O I I I O I O O O O O O O O O O O O O O O O O O O O O O External digital R input External digital G input External digital B input External trap connection Digital 3V power supply for oscillation cell Serial interface load input Serial interface data input Serial interface clock input Phase comparator output Test (Connect to GND.) BLK pulse output CLR pulse output H start pulse 2 output H start pulse 1 output XH start pulse 1 output (reverse polarity of HST1) Digital 3V GND H clock pulse 2 output H clock pulse 1 output XPCG pulse output (reverse polarity of PCG) PCG (precharge) pulse output HD pulse output XV start pulse output (reverse polarity of VST) V start pulse output V clock pulse 4 output V clock pulse 3 output V clock pulse 2 output V clock pulse 1 output XEN pulse 1 output (reverse polarity of EN1) EN pulse 1 output EN pulse 2 output VD pulse output DAC output Digital 3V power supply DCX501BK up/down inverted display switching (open collector output) I/O Description Input pin processing for open status |
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