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SN74ABT32316 Scheda tecnica(PDF) 2 Page - Texas Instruments |
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SN74ABT32316 Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 11 page SN54ABT32316, SN74ABT32316 16BIT TRIPORT UNIVERSAL BUS EXCHANGERS SCBS179A − JUNE 1992 − REVISED JULY 1994 5−2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 description The ′ABT32316 consists of three 16-bit registered input/output (I/O) ports. These registers combine D-type latches and flip-flops to allow data flow in transparent, latch, and clock modes. Data from one input port can be exchanged to one or more of the other ports. Because of the universal storage element, multiple combinations of real-time and stored data can be exchanged among the three ports. Data flow in each direction is controlled by the output-enable (OEA, OEB, and OEC), select-control (SELA, SELB, and SELC), latch-enable (LEA, LEB, and LEC), and clock (CLKA, CLKB, and CLKC) inputs. The A data register operates in the transparent mode when LEA is high. When LEA is low, data is latched if CLKA is held at a high or low logic level. If LEA and clock-enable A (CLKENA) are low, data is stored on the low-to-high transition of CLKA. Output data selection is accomplished by the select-control pins. All three ports have active-low output enables, so when the output-enable input is low, the outputs are active; when the output-enable input is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN54ABT32316 is characterized for operation over the full military temperature range of − 55 °C to 125°C. The SN74ABT32316 is characterized for operation from − 40 °C to 85°C. |
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