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TPS1110DR Scheda tecnica(PDF) 3 Page - Texas Instruments

Il numero della parte TPS1110DR
Spiegazioni elettronici  SINGLE P-CHANNEL LOGIC-LEVEL MOSFETS
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TPS1110DR Scheda tecnica(HTML) 3 Page - Texas Instruments

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TPS1110, TPS1110Y
SINGLE P-CHANNEL LOGIC-LEVEL MOSFETS
SLVS100B – OCTOBER 1994 – REVISED JANUARY 1998
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
UNIT
Drain-to-source voltage, VDS
–7
V
Gate-to-source voltage, VGS
±7
V
VGS =2 7 V
TP = 25°C‡
–5
Continuous drain current ID
VGS = – 2.7 V
TP = 125°C‡
– 2.3
A
Continuous drain current, ID
VGS =4 5 V
TP = 25°C‡
–6
A
VGS = – 4.5 V
TP = 125°C‡
– 2.7
Pulse drain current, ID
TA = 25°C
–24
A
Continuous source current (diode conduction), IS
TA = 25°C
–6
A
Continuous total power dissipation
TP = 25°C‡
4
W
Junction-to-pin thermal resistance (
θJP)
31
°C/W
Continuous total power dissipation
TA = 25°C
1.25
W
Junction-to-ambient thermal resistance (
θJA)
100
°C/W
Storage temperature range, Tstg
– 65 to 150
°C
Operating junction temperature range, TJ
– 40 to 150
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ TP – Temperature of drain pins measured close to the package
electrical characteristics at TJ = 25°C (unless otherwise noted)
static
PARAMETER
TEST CONDITIONS
TPS1110
TPS1110Y
UNIT
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
VGS(th) Gate-to-source threshold voltage
VDS = VGS,
See Figure 9
ID = – 250 µA,
– 0.5
– 0.75
– 0.9
– 0.75
V
VSD
Source-to-drain voltage (diode
forward voltage)§
ISD = – 3 A,
See Figure 8
VGS = 0 V,
– 0.8
– 0.8
V
IGSS
Reverse gate current, drain short
circuited to source
VDS = 0 V,
VGS = – 6 V
±100
nA
I
Z
t
lt
d i
t
VDS = – 7 V,
VGS = 0 V
TJ = 25°C
– 100
nA
IDSS
Zero-gate-voltage drain current
VDS = – 6 V,
TJ = 75°C
– 100
nA
DS
,
VGS = 0 V
TJ = 125°C
–10
µA
rDS( )
Static drain-to-source on-state
VGS = – 4.5 V,
See Figure 5
ID = – 6 A,
65
75
65
m
rDS(on)
resistance§
VGS = – 2.7 V,
See Figure 5
ID = – 2 A,
100
110
100
m
gfs
Forward transconductance§
VDS = – 5 V,
ID = – 6 A
5
5
S
Ciss
Short-circuit input capacitance,
common source
275
275
Coss
Short-circuit output capacitance,
common source
VDS = – 6 V,
f = 1 MHz
VGS = 0 V,
See Figure 6
415
415
pF
Crss
Short-circuit reverse transfer
capacitance, common source
73
73
§ Pulse test: pulse duration
≤ 300 µs, duty cycle ≤ 2%


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