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TPIC3322L Scheda tecnica(PDF) 3 Page - Texas Instruments |
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TPIC3322L Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 12 page TPIC3322L 3CHANNEL COMMONDRAIN LOGICLEVEL POWER DMOS ARRAY SLIS035B − JUNE 1994 − REVISED SEPTEMBER 1995 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 3 resistive-load switching characteristics, TC = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(on) Turn-on delay time 8 16 td(off) Turn-off delay time VDD = 25 V, RL = 67 Ω, tr1 = 10 ns, 12 24 ns tr2 Rise time VDD = 25 V, tf1 = 10 ns, RL = 67 Ω, See Figure 2 tr1 = 10 ns, 14 28 ns tf2 Fall time tf1 = 10 ns, See Figure 2 13 26 Qg Total gate charge VDS = 48 V, ID = 0.375 A, VGS = 5 V, 1.8 2.3 Qgs(th) Threshold gate-to-source charge VDS = 48 V, See Figure 3 ID = 0.375 A, VGS = 5 V, 0.4 0.5 nC Qgd Gate-to-drain charge See Figure 3 1.1 1.4 nC LD Internal drain inductance 5 nH LS Internal source inductance 5 nH Rg Internal gate resistance 0.25 Ω thermal resistance PARAMETER TEST CONDITIONS MIN TYP MAX UNIT RθJA Junction-to-ambient thermal resistance, See Note 4 All outputs with equal power 130 °C/W RθJC Junction-to-case thermal resistance All outputs with equal power 44 C/W NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink. PARAMETER MEASUREMENT INFORMATION IRM† 0 trr(SD) † IRM = maximum recovery current Reverse di/dt = 100 A/ µs 0 25 50 75 150 175 200 225 250 1 0.5 − 0.5 − 1 − 1.5 − 2 − 2.5 1.5 t − Time − ns 100 125 Shaded Area = QRR 25% of IRM† NOTE A. The above waveform represents D1 in shape only. VDS = 48 V VGS = 0 TJ = 25°C Z1, Z2, and Z3 Only Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode |
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