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TPIC2801 Scheda tecnica(PDF) 1 Page - Texas Instruments |
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TPIC2801 Scheda tecnica(HTML) 1 Page - Texas Instruments |
1 / 13 page TPIC2801 OCTAL INTELLIGENT POWER SWITCH WITH SERIAL INPUT SLIS008 − D3282, AUGUST 1989 − REVISED JUNE 1990 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1990, Texas Instruments Incorporated 2−1 • 8-Bit Serial-In Parallel-Out Driver • 1-A Output Current Capability Per Channel or 8-A Total Current • Overcurrent Limiting andOut-of-Saturation Voltage Protection on Driver Outputs • Contains Eight Open-Collector Saturating Sink Outputs With Low On-State Voltage • High-Impedance Inputs With Hysteresis Are Compatible With TTL or CMOS Levels • Very Low Standby Power 20 mW Typical • Status of Output Drivers May Be Monitored at Serial Output • 3-State Serial Output Permits Serial Cascading or Wire-AND Device Connections • 25-V Transient Clamping With Inductive Switching on Outputs, 40-mJ Rating Per Driver Output description The TPIC2801 octal intelligent-power switch is a monolithic BIDFET† integrated circuit designed to sink currents up to 1 A at 30 V simultaneously at each of eight driver outputs under serial input data control. Status of the individual driver outputs is available in serial data format. The driver outputs have overcurrent limiting and out-of-saturation voltage protection features. Applications include driving solenoids, relays, dc motors, lamps, and other medium-current or high-voltage loads. The device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit parallel latch, which independently controls each of the eight Y-output drivers. Data is entered into the device serially via the serial input (SI) and goes directly into the lowest bit (0) of the shift register. Using proper timing signals, the input data is passed to the corresponding output latch and output driver. A logic-high bit at SI turns the corresponding output driver (Yn)off. A logic-low bit at SI turns the corresponding output driver on. Serial data is transferred into SI on the high-to-low transition of serial clock (SCLK) input in 8-bit bytes with data for the Y7 output (most significant bit) first and data for Y0 output (least significant bit) last. Both SI and SCLK are active when serial input-output enable (SIOE) input is low and are disabled when SIOE is high. Each driver output is monitored by a voltage comparator that compares the Y-output voltage level with an internal out-of-saturation threshold voltage reference level. The logic state of the comparator output is dependent upon whether the Y output is greater or smaller than the reference voltage level. An activated driver output is unlatched and turned off when the output voltage exceeds the out-of-saturation threshold voltage level except when the internal unlatch enable is low and disabled. The high-to-low transition of SIOE transfers the logic state of the comparator output to the shift register. † BIDFET − Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process. The tab is electrically connected to GND. 1 2 15 3 4 5 6 7 8 9 10 11 13 12 14 SI Y4 Y7 Y6 Y5 SO GND SCLK SIOE Y0 Y1 Y2 Y3 RST KV PACKAGE (TOP VIEW) VCC PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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