SN74ALS1240

OCTAL BUFFER AND LINE DRIVER

WITH 3STATE OUTPUTS

SDAS054B − DECEMBER 1982 − REVISED JANUARY 1995

Copyright

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Memory Address Registers

Small-Outline (DW) Packages and Standard

Plastic (N) 300-mil DIPs

description

This octal buffer and line driver is designed

specifically to improve both the performance and

density of 3-state memory address drivers, clock

drivers,

and

bus-oriented

receivers

and

transmitters. The designer has a choice of selected combinations of inverting and noninverting outputs,

symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. This device features

high fan-out and improved fan-in.

The SN74ALS1240 is characterized for operation from 0

°C to 70°C.

logic diagram (positive logic)

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

1

2

4

6

8

19

11

13

15

17

3

5

7

9

12

14

16

18

1A1

1A2

1A3

1A4

1Y1

2A1

2A2

2A3

2A4

2Y1

1Y2

1Y3

1Y4

2Y2

2Y3

2Y4

1OE

2OE

2

1A1

4

1A2

6

1A3

8

1A4

EN

1

1Y1

18

1Y2

16

1Y3

14

1Y4

12

11

2A1

13

2A2

15

2A3

17

2A4

EN

19

2Y1

9

2Y2

7

2Y3

5

2Y4

3

1OE

2OE

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

DW OR N PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.