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74LVCH245APW-Q100 Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74LVCH245APW-Q100 Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 16 page 74LVC_LVCH245A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 1 — 3 September 2012 2 of 16 NXP Semiconductors 74LVC_LVCH245A_Q100 Octal bus transceiver; 3-state 3. Ordering information 4. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC245AD-Q100 40 C to +125 C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74LVCH245AD-Q100 74LVC245APW-Q100 40 C to +125 C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74LVCH245APW-Q100 74LVC245ABQ-Q100 40 C to +125 C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 4.5 0.85 mm SOT764-1 74LVCH245ABQ-Q100 Fig 1. Logic diagram Fig 2. IEC logic symbol 2 1 DIR 18 19 B0 B1 B2 B3 B4 B5 B6 B7 3 17 4 16 5 15 6 14 7 13 8 12 9 A0 A1 A2 A3 A4 A5 A6 A7 11 OE mna174 17 3 1 19 2 1 16 4 15 5 14 6 13 7 12 8 11 9 18 G3 3EN1 3EN2 2 mna175 |
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