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CDCLVC1310 Scheda tecnica(PDF) 2 Page - Texas Instruments |
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CDCLVC1310 Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 28 page Output Input XTAL LVCMOS OSC OE Synch Control CDCLVC1310 Differential/ LVCMOS IN_SEL0/ IN_SEL1 v DD v DD CDCLVC1310 SCAS917B – JULY 2011 – REVISED FEBRUARY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. BLOCK DIAGRAM Figure 1. High-Level Block Diagram of CDCLVC1310 2 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): CDCLVC1310 |
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