DEVICE INFORMATION

1

2

3

4

5

6

7

8

+V

DD

X+

Y+

X–

Y–

GND

V

BAT1

V

BAT2

IN1

IN2

A0

A1

SCL

SDA

PENIRQ

V

REF

16

15

14

13

12

11

10

9

TSC2003

Serial Clock

Serial Data

Pen Interrupt

+

1µF

to

10µF

(Optional)

+2.7V to +5V

Touch

Screen

0.1 F

µ

1 F

µ

to

10µF

(Optional)

0.1 F

µ

+

Main

Battery

Secondary

Battery

1.2kΩ

50kΩ

1.2kΩ

Auxiliary Input

Auxiliary Input

Voltage

Regulator

TSC2003-Q1

The TSC2003 is a classic Successive Approximation Register (SAR) analog-to-digital converter (ADC). The

architecture is based on capacitive redistribution which inherently includes a sample-and-hold function. The

converter is fabricated on a 0.6

µ CMOS process.

The basic operation of the TSC2003 is shown in Figure 3. The device features an internal 2.5-V reference and

an internal clock. Operation is maintained from a single supply of 2.7 V to 5.25 V. The internal reference can be

directly sets the input range of the converter.

The analog input (X, Y, and Z parallel coordinates, auxiliary inputs, battery voltage, and chip temperature) to the

converter is provided via a multiplexer. A unique configuration of low on-resistance switches allows an

unselected ADC input channel to provide power and an accompanying pin to provide ground for an external

device. By maintaining Figure 3, a differential input to the converter, and a differential reference architecture, it is

possible to negate the switch’s on-resistance error (should this be a source of error for the particular

measurement).

Figure 3. Basic Operation of the TSC2003

Copyright © 2008, Texas Instruments Incorporated

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Product Folder Link(s): TSC2003-Q1