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ADC1002S020HL Scheda tecnica(PDF) 11 Page - Integrated Device Technology |
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ADC1002S020HL Scheda tecnica(HTML) 11 Page - Integrated Device Technology |
11 / 18 page ADC1002S020_3 © IDT 2012. All rights reserved. Product data sheet Rev. 03 — 2 July 2012 11 of 18 Integrated Device Technology ADC1002S020 Single 10 bits ADC, up to 20 MHz LOW HIGH HIGH LOW ADC1002S020 VDDD VDDO S1 OE OE output data output data 10 % 50 % 50 % 90 % 50 % tdLZ tdZL tdHZ tdZH 20 pF 3.3 k Ω S1 TEST VDDO tdLZ VDDO tdZL VSSO tdZH tdHZ VSSO 014aaa484 frequency on pin OE= 100 kHz. Fig 5. Timing diagram and test conditions of 3-state output delay time 014aaa491 −0.2 0.2 0.6 A (LSB) −0.6 f (MHZ) 0 1200 800 400 200 1000 600 1023 Fig 6. Typical Integral Non-Linearity (INL) performance |
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