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SM320VC5416GGU16EP Scheda tecnica(PDF) 10 Page - Texas Instruments |
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SM320VC5416GGU16EP Scheda tecnica(HTML) 10 Page - Texas Instruments |
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10 / 94 page  Introduction 2 July 2003 SGUS048 2 Introduction This section describes the main features of the SM320VC5416, lists the pin assignments, and describes the function of each pin. This data manual also provides a detailed description section, electrical specifications, parameter measurement information, and mechanical data about the available packaging. NOTE: This data manual is designed to be used in conjunction with the TMS320C54x DSP Functional Overview (literature number SPRU307). 2.1 Description The SM320VC5416 fixed-point, digital signal processor (DSP) (hereafter referred to as the 5416 unless otherwise specified) is based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. This processor provides an arithmetic logic unit (ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The basis of the operational flexibility and speed of this DSP is a highly specialized instruction set. Separate program and data spaces allow simultaneous access to program instructions and data, providing a high degree of parallelism. Two read operations and one write operation can be performed in a single cycle. Instructions with parallel store and application-specific instructions can fully utilize this architecture. In addition, data can be transferred between data and program spaces. Such parallelism supports a powerful set of arithmetic, logic, and bit-manipulation operations that can all be performed in a single machine cycle. The 5416 also includes the control mechanisms to manage interrupts, repeated operations, and function calls. 2.2 Pin Assignments Figure 2−1 illustrates the ball locations for the 144-pin ball grid array (BGA) package and is used in conjunction with Table 2−1 to locate signal names and ball grid numbers. Figure 2−2 provides the pin assignments for the 144-pin low-profile quad flatpack (LQFP) package. 2.2.1 Terminal Assignments for the GGU Package A B D C E F H J L M K N G 1 2 3 4 5 6 7 8 10 12 11 13 9 Figure 2−1. 144-Ball GGU MicroStar BGA (Bottom View) Table 2−1 lists each signal name and BGA ball number for the 144-pin SM320VC5416GGU package. Table 2−2 lists each terminal name, terminal function, and operating modes for the SM320VC5416. TMS320C54x and MicroStar BGA are trademarks of Texas Instruments. |
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