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CDCE949QPWRQ1 Scheda tecnica(PDF) 11 Page - Texas Instruments

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Il numero della parte CDCE949QPWRQ1
Spiegazioni elettronici  PROGRAMMABLE 4-PLL VCXO CLOCK SYNTHESIZER WITH 1.8-V, 2.5-,V and 3.3-V LVCMOS OUTPUTS
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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EEPROM
Xin
Xout
V
DD
GND
V
DDOUT
X-tal
Y2=27MHz
Y1=27MHz
Y3=27MHz
LV
CMOS
Pdiv1=1
Y4=27MHz
Y5=27MHz
Y6=27MHz
Y7=27MHz
Y8=27MHz
Y9=27MHz
LV
CMOS
Pdiv9=1
Pdiv8=1
LV
CMOS
LV
CMOS
Pdiv7=1
Pdiv6=1
LV
CMOS
LV
CMOS
Pdiv5=1
Pdiv4=1
LV
CMOS
LV
CMOS
Pdiv3=1
Pdiv2=1
LV
CMOS
Programming
and
SDA/SCL
Register
InputClock
PLL Bypass
PLL 1
powerdown
PLL Bypass
PLL 2
powerdown
PLL Bypass
PLL 3
powerdown
PLL Bypass
PLL 4
powerdown
S0
SDA
SCL
27MHz
Crystal
ProgrammingBus
“1” =outputsenabled
“0” =outputs3-State
CDCE949-Q1
www.ti.com
SCAS891 – FEBRUARY 2010
Table 3. Y1 Setting(1)
Y1 SELECTION
Y1
FUNCTION
0
State 0
1
State 1
(1)
State0 and State1 are user-definable in Generic Configuration
Register and can be power down, 3-state, low or active.
The S1/SDA and S2/SCL pins of the CDCE949 are dual-function pins. In the default configuration they are
defined as SDA/SCL for the serial interface. They can be programmed as control pins (S1/S2) by setting the
appropriate bits in the EEPROM. Note that changes to the Control register (Bit [6] of Byte 02) have no effect until
they are written into the EEPROM.
Once they are set as control pins, the serial programming interface is no longer available. However, if VDDOUT is
forced to GND, the two control-pins, S1 and S2, temporarily act as serial programming pins (SDA/SCL).
S0 is not a multi-use pin, it is a control pin only.
DEFAULT DEVICE SETTING
The internal EEPROM of CDCE949 is preconfigured as shown in Figure 5. (The input frequency is passed
through to the output as a default.) This allows the device to operate in default mode without the extra production
step of programming it. The default setting appears after power is supplied or after a power-down/up sequence
until it is reprogrammed by the user to a different application configuration. A new register setting is programmed
via the serial SDA/SCL Interface.
Figure 5. Default Configuration
Table 4 shows the default setting for the Control Terminal Register (external control pins). In normal operation, all
8 register settings are available, but in the default configuration only the first two settings (0 and 1) can be
selected with S0, as S1 and S2 are configured as programming pins in default mode.
Copyright © 2010, Texas Instruments Incorporated
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