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SL74HC125N Scheda tecnica(PDF) 1 Page - System Logic Semiconductor |
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SL74HC125N Scheda tecnica(HTML) 1 Page - System Logic Semiconductor |
1 / 5 page SL74HC125 System Logic Semiconductor SLS Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS The SL74HC125 is identical in pinout to the LS/ALS125. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The SL74HC125 noninverting buffers are designed to be used with 3- state memory address drivers, clock drivers, and other bus-oriented systems. The devices have four separate output enables that are active- low. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC125N Plastic SL74HC125D SOIC TA = -55 ° to 125° C for all packages LOGIC DIAGRAM PIN 14 =VCC PIN 7 = GND PIN ASSIGNMENT FUNCTION TABLE Inputs Output A OE Y H L H L L L X H Z X = don’t care Z = high impedance |
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