CDCM6208 datasheet(7/78 Pages) TI

Il numero della parte	CDCM6208

Spiegazioni elettronici	2:8 CLOCK GENERATOR, JITTER CLEANER WITH FRACTIONAL DIVIDERS

Download	78 Pages

Scroll/Zoom	100%

Produttore elettronici	TI [Texas Instruments]

Homepage	http://www.ti.com

Logo

7 / 78 page

CDCM6208

www.ti.com

SCAS931A – MAY 2012 – REVISED JUNE 2012

Table 4. CDCM6208 Pin Assignments (continued)

I/O

TYPE

DESCRIPTION

NAME

Number

Output and

LVCMOS

STATUS1: Status pin in SPI/I2C modes. For details see Table 28 for pin

STATUS1/PIN0

45

Input

no pull resistor

modes and Table 28 for status mode. PIN0: Control pin 0 in pin mode.

Serial Interface Mode or Pin mode selection.SI_MODE[1:0]=00: SPI

LVCMOSw

SI_MODE1

47

Input

mode;SI_MODE[1:0]=01: I2C mode;SI_MODE[1:0]=10: Pin Mode (No

50k

Ω pull-up

serial programming);SI_MODE[1:0]=11: RESERVED

LVCMOSw

SI_MODE0

1

50k

Ω pull-down

LVCMOS in

SDI: SPI Serial Data Input SDA: I2C Serial Data (Read/Write bi-

Open drain out

SDI/SDA/PIN1

2

I/O

directional), open drain output; requires a pull-up resistor in I2C

LVCMOS in

mode;PIN1: Control pin 1 in pin mode

no pull resistor

LVCMOS out

LVCMOS in

SDO: SPI Serial Data AD0: I2C Address Offset Bit 0 inputPIN2: Control

SDO/AD0/PIN2

3

Output/Input

LVCMOS in

pin 2 in pin mode

no pull resistor

LVCMOS no

SCS: SPI Latch EnableAD1: I2C Address Offset Bit 1 inputPIN3: Control

SCS/AD1/PIN 3

4

Input

pull resistor

pin 3 in pin mode

LVCMOS no

SCL/PIN4

5

Input

SCL: SPI/I2C ClockPIN4: Control pin 4 in pin mode

pull resistor

In SPI/I2C programming mode, external RESETN signal (active low).

RESETN = V IL: device in reset (registers values are retained)

RESETN = V IH: device active. The device can be programmed while

RESETN is held low (this is useful to avoid any false output frequencies

LVCMOS

RESETN/PWR

44

Input

at power up).

w/ 50k

Ω pull-up

In Pin mode this pin controls device core and I/O supply voltage setting.

0 = 1.8 V, 1 = 2.5/3.3 V for the device core and I/O power supply

voltage. In pin mode, it is not possible to mix and match the supplies. All

supplies should either be 1.8 V or 2.5/3.3 V.

Regulator Capacitor; connect a 10 µF cap with ESR below 1

Ω to GND

REG_CAP

40

Output

Analog

at frequencies above 100 kHz

Power Down Active low. When PDN = VIH is normal operation. When

PDN = VIL, the device is disabled and current consumption minimized.

LVCMOS

Exiting power down resets the entire device and defaults all registers. It

PDN

43

Input

w/ 50k

Ω pull-up

is recommended to connect a capacitor to GND to hold the device in

power-down until the digital and PLL related power supplies are stable.

See section on power down in the application section.

LVCMOS

Active low. Device outputs are synchronized on a low-to-high transition

SYNCN

42

Input

w/ 50k

Ω pull-up

on the SYNCN pin. SYNCN held low disables all outputs.

ORDERING INFORMATION

TA

PACKAGED DEVICES

FEATURES

-40°C to 85°C

CDCM6208V1RGZT

48-pin QFN (RGZ) Package, small tape and reel

-40°C to 85°C

CDCM6208V2RGZT

48-pin QFN (RGZ) Package, small tape and reel

-40°C to 85°C

CDCM6208V1RGZR

48-pin QFN (RGZ) Package, tape and reel

-40°C to 85°C

CDCM6208V2RGZR

48-pin QFN (RGZ) Package, tape and reel

Submit Documentation Feedback

7

Product Folder Link(s): CDCM6208

Codice articolo simile - CDCM6208

Produttore elettronici	Il numero della parte	Scheda tecnica	Spiegazioni elettronici
Texas Instruments	CDCM6208	2Mb / 89P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
	CDCM6208	2Mb / 92P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
	CDCM6208V1F	2Mb / 87P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
	CDCM6208V1FRGZR	2Mb / 87P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
	CDCM6208V1FRGZT	2Mb / 87P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner with Fractional Dividers

More results

Descrizione simile - CDCM6208

Produttore elettronici	Il numero della parte	Scheda tecnica	Spiegazioni elettronici
Texas Instruments	CDCM6208V1F	2Mb / 87P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
	CDCM6208	2Mb / 89P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
	CDCM6208	2Mb / 92P	[Old version datasheet] 2:8 Clock Generator, Jitter Cleaner With Fractional Dividers
	CDCM6208V2G	2Mb / 88P	[Old version datasheet] CDCM6208V2G 2:8 Clock Generator, Jitter Cleaner with Fractional Dividers
Analog Devices	AD9523	1,011Kb / 60P	Jitter Cleaner and Clock Generator
Analog Devices	AD9524	973Kb / 56P	Jitter Cleaner and Clock Generator
Texas Instruments	CDCE62002	1Mb / 49P	[Old version datasheet] Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs
	LMK04100	588Kb / 46P	[Old version datasheet] Clock Jitter Cleaner with Cascaded PLLs
	LMK04100	1Mb / 52P	[Old version datasheet] Family Clock Jitter Cleaner
	CDCE62005	2Mb / 80P	[Old version datasheet] Five/Ten Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs

More results

CDCM6208 Scheda tecnica(PDF) 7 Page - Texas Instruments

CDCM6208 Scheda tecnica(HTML) 7 Page - Texas Instruments

Codice articolo simile - CDCM6208

Descrizione simile - CDCM6208

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

Scheda tecnica Scarica

Link URL