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SM802112UMGTR Scheda tecnica(PDF) 6 Page - Micrel Semiconductor |
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SM802112UMGTR Scheda tecnica(HTML) 6 Page - Micrel Semiconductor |
6 / 12 page Micrel, Inc. SM802112 September 2011 6 M9999-091411-A hbwhelp@micrel.com or (408) 955-1690 AC Electrical Characteristics (4, 5) VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. Symbol Parameter Condition Min. Typ. Max. Units Q0 Output 480 FOUT Output Frequency Q1, Q2 Outputs 80 MHz FREF Reference Input Frequency 80 MHz LVDS Output Rise/Fall Time 20% – 80% 100 250 400 TR/TF LCMOS Output Rise/Fall Time 20% – 80% 100 250 500 ps LVDS Outputs 48 50 52 ODC Output Duty Cycle LVCMOS Output 45 50 55 % TSKEW Output-to-Output Skew Q1 to Q2, Note 6 60 150 ps TLOCK PLL Lock Time 20 ms Tjit(∅) RMS Phase Jitter (7) 480MHz LVDS Integration Range (1kHz – 100MHz) 80MHz LVDS, LVCMOS Integration Range (1kHz – 20MHz) 300 290 600 600 fs Phase Noise Input Phase Noise 80MHz Input Frequency Offset Frequency: 1kHz 10kHz 100kHz 1MHz −124 −135 −143 −145 dBc Output Phase Noise 480MHz Output Frequency Offset Frequency: 1kHz 10kHz 100kHz 1MHz 10MHz 20MHz 100MHz −105 −115 −120 −120 −150 −154 −160 dBc Phase Noise Spurious Noise Components 80MHz for Q0 480MHz −58 -48 dBc Notes: 5. All phase noise measurements were taken with an Agilent 5052B phase noise system. 6. Defined as skew between outputs at the same supply voltage and temperature. Measured as the difference of the output differential crossing point of Q1 and /Q1 80MHz LVDS, and the 50% point of LVCMOS Q2. LVCMOS Q2 and /Q2 are both ac coupled into 50 ohms. 7. REF_IN driven with a low-noise source, ClockWorks SM802001 programmed for an 80MHz CMOS output. If using an external reference input, use a low phase noise source. With an external reference, the phase noise will follow the input source phase noise up to about 1MHz. Measured with input noise of 1kHz -126dBc, 10kHz -136dBc, 100kHz -143dBc, 1MHz -146dBc. |
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