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TS1101-200EG6TP Scheda tecnica(PDF) 8 Page - Touchstone Semiconductor Inc |
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TS1101-200EG6TP Scheda tecnica(HTML) 8 Page - Touchstone Semiconductor Inc |
8 / 11 page TS1101 Page 8 TS1101DS r1p0 RTFDS external VSENSE, op amp feedback action drives the gate of M1 such that M1 ’s drain-source current is equal to: IDS M1 VS NS RGAINA or IDS M1 ILOAD x RS NS RGAINA Since M1’s drain terminal is connected to ROUT, the output voltage of the TS1101 at the OUT terminal is, therefore; VO T ILOAD x RS NS x RO T RGAINA When the voltage at the RS- terminal is greater than the voltage at the RS+ terminal, the external VSENSE voltage drop is impressed upon RGAINB. The voltage drop across RGAINB is then converted into a current by M2 that then produces an output voltage across ROUT. In this design, when M1 is conducting current (VRS+ > VRS- , the TS1101’s internal amplifier holds M2 OFF. When M2 is conducting current (VRS- > VRS+), the internal amplifier holds M1 OFF. In either case, the disabled FET does not contribute to the resultant output voltage. The current- sense amplifier’s gain accuracy is therefore the ratio match of ROUT to RGAIN[A/B]. For each of the four gain options available, Table 1 lists the values for ROUT and RGAIN[A/B]. The TS1101 ’s output stage is protected against input overdrive by use of an output current-limiting circuit of 3mA (typical) and a 7V internal clamp protection circuit. Table 1: Internal Gain Setting Resistors (Typical Values) GAIN (V/V) RGAIN[A/B] ( Ω) ROUT ( Ω) Part Number 25 400 10k TS1101-25 50 200 10k TS1101-50 100 100 10k TS1101-100 200 100 20k TS1101-200 The SIGN Comparator Output As shown in the TS1101’s block diagram, the design of the TS1101 incorporated one additional feature – an analog comparator the inputs of which monitor the internal amplifier’s differential output voltage. While the voltage at the TS1101’s O T terminal indicates the magnitude of the load current, the TS1101’s SIGN output indicates the load current’s direction. The SIGN output is a logic high when M1 is conducting current (VRS+ > VRS-). Alternatively, the SIGN output is a logic low when M2 is conducting current (VRS+ < VRS-). The SIGN comparator’s transfer characteristic is illustrated in Figure 1. Unlike other current-sense amplifiers that implement a OUT/SIGN arrangement, the TS1101 exhibits no “dead zone” at I LOAD switchover. Figure 1: TS1101's SIGN Comparator Transfer Characteristic. Figure 2: SIGN Comparator Propagation Delay vs VSENSE. 100 0.1 10 1 VSENSE (│VRS+ - VRS-│) - mV 0.1 1 10 100 |
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