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FAN3850TUC15X35 Scheda tecnica(PDF) 10 Page - Fairchild Semiconductor |
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FAN3850TUC15X35 Scheda tecnica(HTML) 10 Page - Fairchild Semiconductor |
10 / 11 page © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN3850T • Rev. 3.0.0 10 Physical Dimensions Figure 10. 6-Ball, Wafer-Level Chip-Scale Package (WLCSP) Table 1. Product-Specific Dimensions D E X Y 1.260mm 0.860mm 0.145mm 0.145mm Ball Composition: SN97.5-Ag2.5 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. BOTTOM VIEW TOP VIEW 1 2 A B C 6X 0.005 CA B (X) +/-0.018 (Y) +/-0.018 Ø0.120±0.010 F E D B A PIN A1 AREA F 2X 2X (Ø0.120) CU PAD SIDE VIEWS 0.06 C D C SEATING PLANE 0.03 C 0.03 C NOTES: A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE TYPICAL HEIGHT IS 273 MICRONS ±23 MICRONS (254-300 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILENAME: UC006AHrev3. E 0.080±0.010 0.570 0.485 0.197±0.013 0.300 0.254 0.570 0.485 RECOMMENDED LAND PATTERN (NSMD) (Ø0.220) SOLDER MASK A1 0.01 C |
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