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SI7137DP Scheda tecnica(PDF) 11 Page - Vishay Siliconix |
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SI7137DP Scheda tecnica(HTML) 11 Page - Vishay Siliconix |
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11 / 13 page  www.vishay.com 4 Document Number 71622 28-Feb-06 Vishay Siliconix AN821 SYSTEM AND ELECTRICAL IMPACT OF PowerPAK SO-8 In any design, one must take into account the change in MOSFET rDS(on) with temperature (Figure 7). A MOSFET generates internal heat due to the current passing through the channel. This self-heating raises the junction temperature of the device above that of the PC board to which it is mounted, causing increased power dissipation in the device. A major source of this problem lies in the large values of the junction-to-foot thermal resistance of the SO-8 package. PowerPAK SO-8 minimizes the junction-to-board ther- mal resistance to where the MOSFET die temperature is very close to the temperature of the PC board. Consider two devices mounted on a PC board heated to 105 °C by other components on the board (Figure 8). Suppose each device is dissipating 2.7 W. Using the junction-to-foot thermal resistance characteristics of the PowerPAK SO-8 and the standard SO-8, the die tem- perature is determined to be 107 °C for the PowerPAK (and for DPAK) and 148 °C for the standard SO-8. This is a 2 °C rise above the board temperature for the Pow- erPAK and a 43 °C rise for the standard SO-8. Referring to Figure 7, a 2 °C difference has minimal effect on rDS(on) whereas a 43C difference has a significant effect on rDS(on). Minimizing the thermal rise above the board tempera- ture by using PowerPAK has not only eased the thermal design but it has allowed the device to run cooler, keep rDS(on) low, and permits the device to handle more cur- rent than the same MOSFET die in the standard SO-8 package. CONCLUSIONS PowerPAK SO-8 has been shown to have the same thermal performance as the DPAK package while hav- ing the same footprint as the standard SO-8 package. The PowerPAK SO-8 can hold larger die approximately equal in size to the maximum that the DPAK can accom- modate implying no sacrifice in performance because of package limitations. Recommended PowerPAK SO-8 land patterns are pro- vided to aid in PC board layout for designs using this new package. Thermal considerations have indicated that significant advantages can be gained by using PowerPAK SO-8 devices in designs where the PC board was laid out for the standard SO-8. Applications experimental data gave thermal performance data showing minimum and typical thermal performance in a SO-8 environment, plus infor- mation on the optimum thermal performance obtainable including spreading copper. This further emphasized the DPAK equivalency. PowerPAK SO-8 therefore has the desired small size characteristics of the SO-8 combined with the attractive thermal characteristics of the DPAK package. Figure 7. MOSFET rDS(on) vs. Temperature Figure 8. Temperature of Devices on a PC Board 0.6 0.8 1.0 1.2 1.4 1.6 1.8 - 50 - 25 0 25 50 75 100 125 150 VGS = 10 V ID = 23 A On-Resistance vs. Junction Temperature TJ - Junction Temperature (°C) 0.8 °C/W 107 °C PowerPAK SO-8 16 C/W 148 °C Standard SO-8 PC Board at 105 °C |
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