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LB11826 Scheda tecnica(PDF) 8 Page - Sanyo Semicon Device |
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LB11826 Scheda tecnica(HTML) 8 Page - Sanyo Semicon Device |
8 / 11 page LB11826 No.7109-8/11 Continued from preceding page. Pin No. Pin name Pin function Equivalent circuit 14 DOUT Speed discriminator output. Accelerate : high, decelerate : low. 14 VREG 300 Ω 15 LD Speed lock detection output. L when the motor speed is within the speed lock range (±6.25%). Voltage resistance 30V max. 15 VREG 16 FGOUT FG amplifier output pin. VREG FG schmitt comparator 16 17 18 FGIN- FGIN+ FG amplifier input pin. Connection of a capacitor (about 0.1 μF) between FGIN and GND causes initial reset to the logic circuit. 300 Ω FG Reset 20k Ω 20k Ω 18 17 VREG 300 Ω 19 S/S Start/stop control pin. Low : 0V to 1.5V High : 3.5V to VREG H level when open. Hysteresis width about 0.5V. 19 VREG 2k Ω 22k Ω 20 GND1 GND pin (Other than the output). Continued on next page. |
Codice articolo simile - LB11826 |
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Descrizione simile - LB11826 |
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