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GS1561-CFE3 Scheda tecnica(PDF) 4 Page - Gennum Corporation |
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GS1561-CFE3 Scheda tecnica(HTML) 4 Page - Gennum Corporation |
4 / 79 page GS1560A/GS1561 HD-LINX® II Dual-Rate Deserializer Data Sheet 27360 - 12 June 2009 4 of 79 4.1 Functional Overview..................................................................................................................... 29 4.2 Serial Digital Input ......................................................................................................................... 30 4.2.1 Input Signal Selection ...................................................................................................... 30 4.2.2 Carrier Detect Input.......................................................................................................... 30 4.2.3 Single Input Configuration............................................................................................. 30 4.3 Serial Digital Reclocker ................................................................................................................ 31 4.3.1 External VCO...................................................................................................................... 31 4.3.2 Loop Bandwidth................................................................................................................. 31 4.4 Serial Digital Loop-Through Output (GS1560A only)......................................................... 31 4.4.1 Output Swing...................................................................................................................... 32 4.4.2 Reclocker Bypass Control............................................................................................... 33 4.4.3 Serial Digital Output Mute.............................................................................................. 33 4.5 Serial-To-Parallel Conversion .................................................................................................... 34 4.6 Modes Of Operation ...................................................................................................................... 34 4.6.1 Lock Detect .......................................................................................................................... 34 4.6.2 Master Mode........................................................................................................................ 35 4.6.3 Slave Mode........................................................................................................................... 36 4.7 SMPTE Functionality ..................................................................................................................... 36 4.7.1 SMPTE Descrambling and Word Alignment ............................................................ 37 4.7.2 Internal Flywheel .............................................................................................................. 37 4.7.3 Switch Line Lock Handling............................................................................................. 38 4.7.4 HVF Timing Signal Generation ..................................................................................... 42 4.8 DVB-ASI Functionality ................................................................................................................. 44 4.8.1 Transport Packet Format................................................................................................. 44 4.8.2 DVB-ASI 8b/10b Decoding and Word Alignment.................................................. 44 4.8.3 Status Signal Outputs ....................................................................................................... 45 4.9 Data Through Mode....................................................................................................................... 45 4.10 Additional Processing Functions ............................................................................................45 4.10.1 FIFO Load Pulse............................................................................................................... 46 4.10.2 Ancillary Data Detection and Indication ................................................................ 47 4.10.3 SMPTE 352M Payload Identifier ................................................................................ 51 4.10.4 Automatic Video Standard and Data Format Detection.................................... 51 4.10.5 Error Detection and Indication................................................................................... 55 4.10.6 Error Correction and Insertion ................................................................................... 60 4.10.7 EDH Flag Detection ........................................................................................................ 62 4.11 Parallel Data Outputs.................................................................................................................. 64 4.11.1 Parallel Data Bus Buffers .............................................................................................. 64 4.11.2 Parallel Output in SMPTE Mode................................................................................. 65 4.11.3 Parallel Output in DVB-ASI Mode............................................................................. 65 4.11.4 Parallel Output in Data-Through Mode................................................................... 65 4.11.5 Parallel Output Clock (PCLK) ...................................................................................... 66 4.12 GSPI Host Interface...................................................................................................................... 67 4.12.1 Command Word Description...................................................................................... 67 4.12.2 Data Read and Write Timing....................................................................................... 68 4.12.3 Configuration and Status Registers........................................................................... 68 |
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