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BD00C0AWCP-V5 Scheda tecnica(PDF) 9 Page - Rohm |
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BD00C0AWCP-V5 Scheda tecnica(HTML) 9 Page - Rohm |
9 / 12 page Technical Note 9/11 BD00C0AWFP,BD00C0AWCP-V5 www.rohm.com 2011.08 - Rev.B © 2011 ROHM Co., Ltd. All rights reserved. 10. Output pin It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable capacitance values range from 1µF to 1000µF. Ceramic capacitors can be used as long as their ESR value is low enough to prevent oscillation (0.001Ω to 20Ω). Abrupt fluctuations in input voltage and load conditions may affect the output voltage. Output capacitance values should be determined only through sufficient testing of the actual application. 11. CTL pin Do not make voltage level of chip enable pin keep floating level, or in between VthH and VthL. Otherwise, the output voltage would be unstable or indefinite. 12. For a steep change of the Vcc voltage Because MOS FET for output Transistor is used when an input voltage change is very steep, it may evoke large current. When selecting the value of external circuit constants, please make sure that the operation on the actual application takes these conditions into account. 13. For an infinitesimal fluctuations of output voltage. At the use of the application that infinitesimal fluctuations of output voltage caused by some factors (e.g. disturbance noise, input voltage fluctuations, load fluctuations, etc.), please take enough measures to avoid some influence (e.g. insert the filter, etc.). 14. Over current protection circuit (OCP) The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity. This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current (without latching) in the event of a large and instantaneous current flow from a large capacitor or other component. These protection circuits are effective in preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous or transitive operation of the protection circuits. 15. Thermal shutdown circuit (TSD) The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after this function has activated, or in applications where the operation of this circuit is assumed. Vcc=4V~25V Vo=3V~15V Ta=-40℃~+105℃ R1=5kΩ~10kΩ Cin=2.2µF~100µF Cout=1µF~100µF 0.001 0.01 0.1 1 10 100 0 200 400 600 800 1000 Io(mA) Unstable operating region Stable operating region Cin vs Cout(reference data) Vcc=4V~25V Vo=3V~15V Ta=-40℃~+105℃ Io=0A~1A R1=5kΩ~10kΩ 1 10 100 110 100 Cout(μF) 2.2 Unstable operating region Stable operating region Vcc=6V~25V Vo=5V~15V Ta=-40℃~+105℃ Io=0A~1A R1=5kΩ~10kΩ 1 10 100 110 100 Cout(μF) Stable operating region ※ Operation Notes 10 Measurement circuit Cout(1μF~) Vcc Vo CTL GND ADJ R1 R2 Cin VCTL (5V) (1μF~) ESR Io(ROUT) ( 0.001Ω~) ( 5k~10kΩ) Vcc (4~25V) Cout_ESR vs Io(reference data) |
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