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74LVC1G10DW Scheda tecnica(PDF) 2 Page - Diodes Incorporated |
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74LVC1G10DW Scheda tecnica(HTML) 2 Page - Diodes Incorporated |
2 / 13 page 74LVC1G10 SINGLE 3 INPUT POSITIVE NAND GATE 74LVC1G10 Document number: DS35121 Rev. 3 - 2 2 of 13 www.diodes.com July 2011 © Diodes Incorporated Pin Descriptions Pin Name Description A Data Input GND Ground B Data Input Y Data Output VCC Supply Voltage C Data Input Logic Diagram Function Table Inputs Output A B C Y H H H L L X X H X L X H X X L H Absolute Maximum Ratings (Note 2) Symbol Description Rating Unit ESD HBM Human Body Model ESD Protection 2 KV ESD MM Machine Model ESD Protection 200 V VCC Supply Voltage Range -0.5 to 6.5 V VI Input Voltage Range -0.5 to 6.5 V VO Voltage applied to output in high impedance or IOFF state -0.5 to 6.5 V VO Voltage applied to output in high or low state -0.3 to VCC +0.5 V IIK Input Clamp Current VI<0 -50 mA IOK Output Clamp Current -50 mA IO Continuous output current ±50 mA Continuous current through Vdd or GND ±100 mA TJ Operating Junction Temperature -40 to 150 °C TSTG Storage Temperature -65 to 150 °C Notes: 2. Stresses beyond the absolute maximum may result in immediate failure or reduced reliability. These are stress values and device operation should be within recommend values. A 3 4 Y B 6 C 1 |
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