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ISL55211IRTZ-EVAL1Z Scheda tecnica(PDF) 3 Page - Intersil Corporation |
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ISL55211IRTZ-EVAL1Z Scheda tecnica(HTML) 3 Page - Intersil Corporation |
3 / 20 page ISL55211 3 FN7868.0 June 21, 2011 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VS+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VS+ +0.3V to GND-0.3V Power Dissipation. . . . . . . . . . . . . . . . . . . . See Thermal Conditions Section ESD Rating ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7). . . . . . . . 3500V Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . . . . . . . 250V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500V Latch up (Per JESD-78; Class II; Level A) . . . . . . . . . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 16 Ld TQFN Package (Notes 4, 5) . . . . . . . 63 16.5 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Max. Continuous Operating Junction Temperature . . . . . . . . . . . . .+135°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications VS+ = +3.3V Test Conditions: G = 12dB, VCM = open, VO = 2VP-P, RL = 200Ω differential, TA = +25°C, differential input, differential output, input and output referenced to internal default VCM (1.2V nominal) unless otherwise specified. PARAMETER CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNIT TESTED AC PERFORMANCE Small-Signal Bandwidth (4-port S parameter, Test Circuit 2) G = 6dB, VO = 100mVP-P 1.6 GHz G = 12dB, VO = 100mVP-P 1.4 GHz G = 14dB, VO = 100mVP-P 1.4 GHz Bandwidth for 0.1-dB Flatness G = 12dB, VO = 2VP-P (Figure 17) 150 MHz Large-Signal Bandwidth G = 12dB, VO = 2VP-P 1.2 GHz Gain Accuracy G = 6dB, RL = Open 1.96 2 2.04 V/V * G = 12dB, RL = Open 3.88 4 4.12 V/V * G = 14dB, RL = Open 4.8 5 5.2 V/V Slew Rate (Differential) 5,600 V/µs Differential Rise/Fall Time 2-V step (simulated) 0.22 ns 2nd-order Harmonic Distortion, Test Circuit 1, 15dB Gain f = 20MHz, VO = 2VP-P -110 dBc f = 50MHz, VO = 2VP-P -98 dBc f = 100MHz, VO = 2VP-P -85 dBc 3rd-order Harmonic Distortion, Test Circuit 1, 15dB Gain f = 20MHz, VO = 2VP-P -120 dBc f = 50MHz, VO = 2VP-P -110 dBc f = 100MHz, VO = 2VP-P -100 dBc 2nd-order Intermodulation Distortion, Test Circuit 1, 15dB Gain fc = 70MHz, 200kHz spacing (2VP-P envelope) -89 dBc fc = 140MHz, 200kHz spacing (2VP-P envelope) -78 dBc 3rd-order Intermodulation Distortion, Test Circuit 1, 15dB Gain fc = 70MHz, 200kHz spacing (2VP-P envelope) -104 dBc fc = 140MHz, 200kHz spacing (2VP-P envelope) -92 dBc Output Voltage Noise Test Circuit 1, total gain 15dB, ADT2-1T 11.2 nV/√Hz DC PERFORMANCE (Internal Nodes) Input Offset Voltage TA = +25°C -1.4 ±0.1 +1.4 mV * TA = -40°C to +85°C -1.6 ±0.1 +1.6 mV |
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