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FAN5234MTCX Scheda tecnica(PDF) 3 Page - Fairchild Semiconductor |
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FAN5234MTCX Scheda tecnica(HTML) 3 Page - Fairchild Semiconductor |
3 / 15 page © 2004 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5234 • Rev. 2.0.0 3 Pin Configuration VIN PGOOD EN ILIM VOUT VSEN SS AGND FAN5234 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FPWM BOOT HDRV SW ISNS VCC LDRV PGND Figure 3. Pin Configuration Pin Definitions Pin # Name Description 1 VIN Input Voltage . Connect to main input power source (battery), also used to program operating frequency for low input voltage operation (see Table 1). 2 PGOOD Power-Good Flag . An open-drain output that pulls LOW when VSEN is outside of a ±10% range of the 0.9V reference. 3 EN Enable . Enables operation when pulled to logic HIGH. Toggling EN resets the regulator after a latched fault condition. This is a CMOS input whose state is indeterminate if left open. 4 ILIM Current Limit . A resistor from this pin to GND sets the current limit. 5 VOUT Output Voltage . Connect to output voltage. Used for regulation to ensure a smooth transition during mode changes. When VOUT is expected to exceed VCC, tie this pin to VCC. 6 VSEN Output Voltage Sense . The feedback from the output. Used for regulation as well as power-good, under-voltage, and over-voltage protection monitoring. 7 SS Soft-Start . A capacitor from this pin to GND programs the slew rate of the converter during initialization, when this pin is charged with a 5µA current source. 8 AGND Analog Ground . This is the signal ground reference for the IC. All voltage levels are measured with respect to this pin. 9 PGND Power Ground . The return for the low-side MOSFET driver output. Connect to the gate of the low-side MOSFET. 10 LDRV Low-Side Drive . The low-side (lower) MOSFET driver output. Connect to the gate of the low-side MOSFET. 11 VCC Supply Voltage . This pin powers the chip as well as the LDRV buffers. The IC starts to operate when voltage on this pin exceeds 4.6V (UVLO rising) and shuts down when it drops below 4.3V (UVLO falling). 12 ISNS Current-Sense Input . Monitors the voltage drop across the lower MOSFET or external sense resistor for current feedback. 13 SW Switching Node . Return for the high-side MOSFET driver and a current-sense input. Connect to source of high-side MOSFET and low-side MOSFET drain. 14 HDRV High-Side Drive . High-side (upper) MOSFET driver output. Connect to the gate of the high- side MOSFET. 15 BOOT BOOT . Positive supply for the upper MOSFET driver. Connect as shown in Figure 2. 16 FPWM Forced PWM Mode . When logic HIGH, inhibits the regulation from entering Hysteretic Mode. |
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