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STK22C48 Scheda tecnica(PDF) 1 Page - Cypress Semiconductor

Il numero della parte STK22C48
Spiegazioni elettronici  16-Kbit (2 K 횞 8) AutoStore??nvSRAM
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Produttore elettronici  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

STK22C48 Scheda tecnica(HTML) 1 Page - Cypress Semiconductor

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STK22C48
16-Kbit (2 K × 8) AutoStore™ nvSRAM
Cypress Semiconductor Corporation
198 Champion Court
San Jose
, CA 95134-1709
408-943-2600
Document Number: 001-51000 Rev. *D
Revised March 7, 2011
16-Kbit (2 K × 8) AutoStore nvSRAM
Features
25 ns and 45 ns access times
Hands off automatic STORE on power-down with external
68 µF capacitor
STORE to QuantumTrap™ nonvolatile elements is initiated by
software, hardware, or AutoStore™ on power-down
RECALL to SRAM initiated by software or power-up
Unlimited read, write, and RECALL cycles
1,000,000 STORE cycles to QuantumTrap
100 year data retention to QuantumTrap
Single 5 V +10% operation
Commercial and industrial temperatures
28-pin 300 mil and (330 mil) Small outline integrated circuit
(SOIC) package
Restriction of hazardous substances (RoHS) compliant
Functional Description
The Cypress STK22C48 is a fast static RAM with a nonvolatile
element in each memory cell. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM provides
unlimited read and write cycles, while independent nonvolatile
data resides in the highly reliable QuantumTrap cell. Data
transfers from the SRAM to the nonvolatile elements (the
STORE operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. A hardware STORE is initiated with
the HSB pin.
STORE/
RECALL
CONTROL
POWER
CONTROL
STATIC RAM
ARRAY
32 X 512
Quantum Trap
32 X 512
STORE
RECALL
COLUMN I/O
COLUMN DEC
OE
CE
WE
HSB
VCC
VCAP
A0 A1 A2 A3 A4 A10
A5
A6
A7
A8
A9
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
Logic Block Diagram
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