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LC74761M Scheda tecnica(PDF) 7 Page - Sanyo Semicon Device |
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LC74761M Scheda tecnica(HTML) 7 Page - Sanyo Semicon Device |
7 / 20 page 1 COMMAND0: Display Memory Write Address Setting Command First data byte Register content DA0 to DA7 Register name State Function Note 7 — 1 6 — 0 The command 0 identification code: 5 — 0 sets the display memory write address. 4 — 0 3 V3 0 1 2 V2 0 1 Display memory line address (from 0 to B (hexadecimal)) 1 V1 0 1 0 V0 0 1 Second byte Register content DA0 to DA7 Register name State Function Note 7 — 0 Second byte identification code 6 — 0 5 — 0 4 H4 0 1 3 H3 0 1 2 H2 0 Display memory character address (from 0 to 17 (hexadecimal)) 1 1 H1 0 1 0 H0 0 1 Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0. 2 COMMAND1: Display Character Data Write Setting Command First byte Register content DA0 to DA7 Register name State Function Note 7 — 1 When this command is entered, the 6 — 0 The command 1 identification code: chip locks in display character write 5 — 0 sets the display memory write address. mode until the CS pin is set high. 4 — 1 3 — 0 2 — 0 1 at2 0 Turns character attribute 2 off. Specifies highlight or flashing. 1 Turns character attribute 2 on. 0 at1 0 Turns character attribute 1 off. Specifies reverse video. 1 Turns character attribute 1 on. No. 4846-7/20 LC74761, 74761M |
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