Motore di ricerca datesheet componenti elettronici |
|
LC66356A Scheda tecnica(PDF) 7 Page - Sanyo Semicon Device |
|
LC66356A Scheda tecnica(HTML) 7 Page - Sanyo Semicon Device |
7 / 27 page Continued from preceding page. Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD. CMOS output: Complementary output. OD output: Open-drain output. No. 5487-7/27 LC66P2316 Pin I/O Overview Output driver type Options State after a Standby mode reset operation P50/A11 P51/A12 P52/A13 P53/INT2/TA P60/ML P61 P62/DT P63/PIN1 PC2/CE PC3/DASEC PD0/INV2I PD1/INV2O PD2/INV3I PD3/INV3O I/O ports P50 to P53 • Input or output in 4-bit or 1-bit units • Input or output in 8-bit units when used in conjunction with P40 to P43. • Can be used for output of 8-bit ROM data when used in conjunction with P40 to P43. • P53 is also used as the INT2 interrupt request. • Used as address pins in EPROM mode I/O ports P60 to P63 • Input or output in 4-bit or 1-bit units • P60 is also used as the melody output ML pin. • P62 is also used as the tone output DT pin. • P63 is also used for the event count input to timer 1. I/O ports PC2 to PC3 • Output in 2-bit or 1-bit units • PC3 is also used as the control CE and DASEC pin in EPROM mode. Dedicated input ports PD0 to PD3 Dedicated inverter circuits (option) I/O I/O I I • Pch: Pull-up MOS type • Nch: Intermediate sink current type • Pch: CMOS type • Nch: Intermediate sink current type • Pch: CMOS type • Nch: Intermediate sink current type • When the inverter circuit option is selected. • Pch: CMOS type • Nch: Intermediate sink current type • Pull-up MOS or Nch OD output • Output level on reset CMOS or Nch OD output CMOS or Nch OD output Inverter circuits High or low (option) H H Normal input Inverter I/O goes to the output off state. Hold mode: Output off Hold mode: Output off Hold mode: Port output off Hold mode: Inverter Output off Halt mode: Port output retained Halt mode: Inverter output continues Halt mode: Output retained Halt mode: Output retained PE0 PE1 OSC1 OSC2 RES/VPP/ OE TEST/ EPMOD VDD VSS Dedicated input ports System clock oscillator connections When an external clock is used, leave OSC2 open and connect the clock signal to OSC1. System reset input • When the P33/HOLD pin is at the high level, a low level input to the RES pin will initialize the CPU. • This pin is also used as the VPP/OE pin in EPROM mode. CPU test pin This pin must be connected to VSS during normal operation. Setting this pin to +12 V switches the LC66P2316 to EPROM mode. Power supply pins I I O I I Ceramic oscillator or external clock selection Option selection Hold mode: input disabled Hold mode: oscillator stops Halt mode: inputs accepted Halt mode: oscillator continues |
Codice articolo simile - LC66356A |
|
Descrizione simile - LC66356A |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |