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LC66558A Scheda tecnica(PDF) 11 Page - Sanyo Semicon Device

Il numero della parte LC66558A
Spiegazioni elettronici  Four-Bit Single-Chip Microcontrollers with 4, 6, 8, 12, and 16 KB of On-Chip ROM
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Produttore elettronici  SANYO [Sanyo Semicon Device]
Homepage  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC66558A Scheda tecnica(HTML) 11 Page - Sanyo Semicon Device

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Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Note: 1. Applies to pins with open-drain output specifications. For pins with other than open-drain output specifications, the ratings in the pin column for that
pin apply.
2. For the oscillator input and output pins, levels up to the free-running oscillation level are allowed.
3. Sink current (Applies to PD when the inverter array specifications are selected.)
4. Source current (Applies to all pins except PD for which the pull-up output specifications, the CMOS output specifications, or the inverter array
specifications have been selected. Applies to PD pins for which the inverter array specifications have been selected.)
5. We recommend the use of reflow soldering techniques to solder mount QFP packages.
Please consult with your Sanyo representative for details on process conditions if the package itself is to be directly immersed in a dip-soldering
bath (dip-soldering techniques).
No. 5483-11/25
LC662304A, 662306A, 662308A, 662312A, 662316A
ROM area
Bit
Option specified
Option/data relationship
7
6
5
3FFEH
4
Reserved. Must be set to predefined data values.
This data is generated by the assembler.
3
If the assembler is not used, set this data to ‘00’.
2
1
0
7
6
5
3FFFH
4
Reserved. Must be set to predefined data values.
This data is generated by the assembler.
3
If the assembler is not used, set this data to ‘00’.
2
1
0
Parameter
Symbol
Conditions
Ratings
Unit
Note
Maximum supply voltage
VDD max
VDD
–0.3 to +7.0
V
VIN1
P2, P3 (except for the P33/HOLD pin),
–0.3 to +12.0
V
1
Input voltage
P61, and P63
VIN2
All other inputs
–0.3 to VDD + 0.3
V
2
VOUT1
P2, P3 (except for the P33/HOLD pin),
–0.3 to +12.0
V
1
Output voltage
P61, and P63
VOUT2
All other inputs
–0.3 to VDD + 0.3
V
2
ION1
P0, P1, P2, P3 (except for the P33/HOLD pin),
20
mA
3
P4, P5, P6, PC
Output current per pin
ION2
P41, P43, PC3, PD1, PD3
20
mA
3
–IOP1
P0, P1, P4, P5
2
mA
4
–IOP2
P2, P3 (except for the P33/HOLD pin), P6, and PC
4
mA
4
–IOP3
P41, P43, PC3, PD1, PD3
10
mA
4
Σ I
ON1
P0, P1, P2, P3 (except for the P33/HOLD pin), PD
75
mA
3
Total pin current
Σ I
ON2
P4, P5, P6, PC
75
mA
3
Σ I
OP1
P0, P1, P2, P3 (except for the P33/HOLD pin), PD
25
mA
4
Σ I
OP2
P4, P5, P6, PC
25
mA
4
Allowable power dissipation
Pd max
Ta = –30 to +70°C: DIP42S (QFP48E)
600 (430)
mW
5
Operating temperature
Topr
–30 to +70
°C
Storage temperature
Tstg
–55 to +125
°C


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