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AD7467BRM Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD7467BRM Scheda tecnica(HTML) 4 Page - Analog Devices |
4 / 28 page AD7466/AD7467/AD7468 Rev. C | Page 4 of 28 Parameter B Version Unit Test Conditions/Comments LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA, VDD = 1.6 V to 3.6 V Output Low Voltage, VOL 0.2 V max ISINK = 200 μA Floating-State Leakage Current ±1 μA max Floating-State Output Capacitance 10 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 4.70 μs max 16 SCLK cycles with SCLK at 3.4 MHz Throughput Rate 200 kSPS max See the Serial Interface section POWER REQUIREMENTS VDD 1.6/3.6 V min/max IDD Digital inputs = 0 V or VDD Normal Mode (Operational) 300 μA max VDD = 3 V, fSAMPLE = 100 kSPS 110 μA typ VDD = 3 V, fSAMPLE = 50 kSPS 20 μA typ VDD = 3 V, fSAMPLE = 10 kSPS 240 μA max VDD = 2.5 V, fSAMPLE = 100 kSPS 80 μA typ VDD = 2.5 V, fSAMPLE = 50 kSPS 16 μA typ VDD = 2.5 V, fSAMPLE = 10 kSPS 165 μA max VDD = 1.8 V, fSAMPLE = 100 kSPS 50 μA typ VDD = 1.8 V, fSAMPLE = 50 kSPS 10 μA typ VDD = 1.8 V, fSAMPLE = 10 kSPS Power-Down Mode 0.1 μA max SCLK on or off, typically 8 nA Power Dissipation See the Power Consumption section Normal Mode (Operational) 0.9 mW max VDD = 3 V, fSAMPLE = 100 kSPS 0.6 mW max VDD = 2.5 V, fSAMPLE = 100 kSPS 0.3 mW max VDD = 1.8 V, fSAMPLE = 100 kSPS Power-Down Mode 0.3 μW max VDD = 3 V |
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