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LM3464MHX Scheda tecnica(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Il numero della parte LM3464MHX
Spiegazioni elettronici  LED Driver with Dynamic Headroom Control and Thermal Control Interfaces
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Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM3464MHX Scheda tecnica(HTML) 6 Page - National Semiconductor (TI)

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background image
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LED Current Regulator
V
GDx-MAX
GDx gate driver max. output voltage
4.73
V
CC–1
V
V
GDx-MIN
GDx gate driver min. output voltage
0.115
0.127
V
I
GDx-MAX
GDx gate driver short circuit current
GDx short to GND
8
mA
I
DRx
DRx pin input current
V
DRx = 10V
25
29
μA
V
DRx = 100V
55
70
μA
Fault Detection and Handling
V
OVP-TH
DRx Pin over-voltage protection threshold
Measure at DRx pin
18
19
21
V
V
SHORTFAULT
DRx short fault threshold
Any V
DRx < 2.5V
8.35
8.4
9.75
V
V
OPENFAULT
SEx open fault threshold
Measure at SEx pin
30
mV
I
FAULT-CAP
FAULT_CAP pin output current
All V
DRx < VOVP-TH
25
uA
I
FAULT-CAP-OVP
FAULT_CAP pin output current at DRx
over-voltage
Any V
DRx VOVP-TH
105
uA
V
FAULT-CAP
FAULT-CAP pin voltage threshold at fault
timer expire
V
FAULT-CAP rising
3.6
V
R
Faultb
Faultb pin to GND resistance
LED fault = TRUE
110
Thermal Protection
T
OTM-TH
Over Temperature Monitor Threshold
125
°C
T
OTM-HYS
Over Temperature Monitor Hysteresis
20
°C
T
SD
Thermal shutdown temperature
T
J rising
165
°C
T
SD-HYS
Thermal shutdown temperature hysteresis
T
J falling
20
°C
Thermal Resistance
θ
JA
Junction to Ambient (Note 3)
eTSSOP-28 Package
33.5
°C/W
θ
JC
Junction to Case (Note 3)
6
°C/W
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 k
Ω resistor into each pin.
Note 3: Measurements are performed on a 4 layer JEDEC board with 10 vias provided under the exposed pad. See JESD51–1 to JESD51–11. The value of
θ
JA is specifically dependent on the PCB trace area, trace material and the number of layers and thermal vias.
Note 4: V
CC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
www.national.com
6


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