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ISL33001IUZ Scheda tecnica(PDF) 7 Page - Intersil Corporation

Il numero della parte ISL33001IUZ
Spiegazioni elettronici  I2C Bus Buffer with Rise Time Accelerators and Hot Swap Capability
Download  19 Pages
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL33001IUZ Scheda tecnica(HTML) 7 Page - Intersil Corporation

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7
FN7560.2
September 30, 2010
Test Circuits and Waveforms
FIGURE 1. ENABLE DELAY TIME
FIGURE 2. BUS IDLE TIME
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. INPUT TO OUTPUT OFFSET VOLTAGE
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. OUTPUT LOW VOLTAGE
VCC
0V
VEN
VREADY
VCC
0V
0.5 * VCC
0.5 * VCC
tEN-LH
- SDA and SCL pins connected to VCC
- Enable Delay Time Measured on ISL33001 only
- ISL33003 performance inferred from ISL33001
- VSDA_IN = VSDA_OUT = VSCL_OUT = VEN = VCC
VCC
0V
VREADY
VCC
0V
0.5VCC
0.5VCC
tIDLE
- EN Logic High for t > Enable Delay, tEN_LH
prior to SCL_IN transition
VSCL_IN
- Bus Idle Time Measured on ISL33001 only
- ISL33002 and ISL33003 performance
inferred from ISL33001
SCL_IN
SDA_IN
SCL_OUT
SDA_OUT
VCC1
+3.3V
0.2V
10kΩ
10kΩ
10kΩ
10kΩ
GND
0.2V
VIN
VIN
SCL_IN OR
SDA_IN
SCL_OUT OR
SDA_OUT
VO
0.2V
VOS = VO - 0.2V
SCL_IN
SDA_IN
SCL_OUT
SDA_OUT
VCC1
+2.7V
0V
900Ω
900Ω
900Ω
GND
0V
900Ω
SCL_OUT
VOL
VCC1
SDA_OUT
VOL
VCC1
ISL33001, ISL33002, ISL33003


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