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AD8375ACPZ-WP Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD8375ACPZ-WP Scheda tecnica(HTML) 4 Page - Analog Devices |
4 / 24 page AD8375 Rev. 0 | Page 4 of 24 Parameter Conditions Min Typ Max Unit POWER INTERFACE Supply Voltage 4.5 5.0 5.5 V VPOS and Output Quiescent Current Thermal connection made to exposed paddle under device 120 125 130 mA vs. Temperature −40°C ≤ TA ≤ +85°C 150 mA Power-Down Current PWUP low 2.5 mA vs. Temperature −40°C ≤TA ≤ +85°C 3 mA POWER-UP/GAIN CONTROL Pin A0 to Pin A4, Pin PWUP VIH Minimum voltage for a logic high 1.6 V VIL Maximum voltage for a logic low 0.8 V Logic Input Bias Current 900 nA Table 2. Gain Code vs. Voltage Gain Look-Up Table 5-Bit Binary Gain Code Voltage Gain (dB) 00000 +20 00001 +19 00010 +18 00011 +17 00100 +16 00101 +15 00110 +14 00111 +13 01000 +12 01001 +11 01010 +10 01011 +9 01100 +8 5-Bit Binary Gain Code Voltage Gain (dB) 01101 +7 01110 +6 01111 +5 10000 +4 10001 +3 10010 +2 10011 +1 10100 0 10101 −1 10110 −2 10111 −3 11000 −4 >11000 −4 |
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