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74AHC30 Scheda tecnica(PDF) 1 Page - NXP Semiconductors |
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74AHC30 Scheda tecnica(HTML) 1 Page - NXP Semiconductors |
1 / 14 page 1. General description The 74AHC30; 74AHCT30 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC30; 74AHCT30 provides an 8-input NAND function. 2. Features I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N For 74AHC30: CMOS level N For 74AHCT30: TTL level I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information 74AHC30; 74AHCT30 8-input NAND gate Rev. 03 — 26 June 2009 Product data sheet Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC30D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74AHCT30D 74AHC30PW −40 °C to +125 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74AHCT30PW 74AHC30BQ −40 °C to +125 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm SOT762-1 74AHCT30BQ |
Codice articolo simile - 74AHC30_09 |
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Descrizione simile - 74AHC30_09 |
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