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ISL22319UFU8Z Scheda tecnica(PDF) 8 Page - Intersil Corporation

Il numero della parte ISL22319UFU8Z
Spiegazioni elettronici  Single Digitally Controlled Potentiometer XDCP
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22319UFU8Z Scheda tecnica(HTML) 8 Page - Intersil Corporation

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8
FN6310.0
July 3, 2006
Pin Description
Potentiometers Pins
RW
RW is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WR register.
SHDN
The active low SHDN pin forces the resistor to end-to-end
open circuit condition and shorts RWi to GND. When SHDN
is returned to logic high, the previous latch settings put RW
at the same resistance setting prior to shutdown. This pin is
logically OR’d with SHDN bit in ACR register. I2C interface is
still available in shutdown mode and all registers are
accessible. This pin must remain HIGH for normal operation.
Bus Interface Pins
Serial Data Input/Output (SDA)
The SDA is a bidirectional serial data input/output pin for I2C
interface. It receives device address, operation code, wiper
address and data from an I2C external master device at the
FIGURE 7. END TO END RTOTAL % CHANGE vs
TEMPERATURE
FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm
FIGURE 9. MIDSCALE GLITCH, CODE 3Fh TO 40h
FIGURE 10. LARGE SIGNAL SETTLING TIME
Typical Performance Curves (Continued)
-1.00
-0.50
0.00
0.50
1.00
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (ºC)
10k
50k
Vcc = 5.5V
Vcc = 2.7V
0
15
30
45
60
75
90
105
16
36
56
76
96
TAP POSITION (DECIM AL)
10k
50k
RW
FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE
ISL22319


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