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ISL6114EVAL1Z Scheda tecnica(PDF) 10 Page - Intersil Corporation |
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ISL6114EVAL1Z Scheda tecnica(HTML) 10 Page - Intersil Corporation |
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10 / 24 page  10 FN6457.0 September 25, 2007 ISL6113, ISL6114 Descriptions and Operational Explanation These two ICs target the dual PCI-EXPRESS slot application for add-in cards in servers. Together with a pair of N and P-Channel MOSFETs, four high precision current sense resistors and a handful of passive components, the ISL6113, ISL6114 provide a PCI-E compliant hot plug control solution. These ICs use the Hot Plug Interface (HPI) for communicating, enabling, monitoring and reporting of UV conditions and OC and over temperature faults. Additionally they have a full complement of PCI-E specific I/O. The ISL6113, ISL6114 share the same footprint as their sister part, the ISL6112, which features both SMI and HPI control and communication capabilities, neither of these two has serial bus capabilities. Whereas the ISL6113 has the same turn-on characteristics as the ISL6112, the ISL6114 uses a lower level of current sourcing on the GATE outputs (5µA vs the ISL6113’s 25µA). This lower sourcing current allows the user to use less GATE capacitance for in-rush current and GATE ramp control than the ISL6113 to achieve similar turn-on characteristics. This reduced capacitance in turn provides for a faster turn-off of the MAIN supplies by the ISL6114 in the event of an OC fault than is possible with the ISL6113. Bias, Power-On Reset and Power Cycling The ISL6113, ISL6114 utilizes the VSTBY pins as the only IC bias supply source. For systems without a dedicated 3.3V auxiliary supply, the 3VMAIN supply is to be used for the IC bias. A Power-On Reset (POR) cycle is initiated after VSTBY rises above its UVLO threshold and remains satisfied for tPOR, ~250µs. If VSTBY is recycled, the ISL6113, ISL6114 enters a new power-on-reset cycle. VSTBY must be the first supply voltage applied followed by the MAIN supply inputs. During tPOR, all outputs remain off. PCI-Express (PCI-E) compliance requires that the connector power must be off prior to and during insertion and during removal of a PCI-E board. Before the add-in board is properly inserted into or removed from a connector, the FET switches are turned off via the enabling inputs (ON_X and AUXEN_X). In the event of an improper insertion or removal and to ensure that the power is off when necessary, the ISL6113, ISL6114 has a present input (PRSNT) per slot that overrides and disables the enabling inputs if PRSNT is not pulled low by having a card fully inserted into the slot to complete the pull-down circuit. The PRSNT pin must be a last to make, first to break connection to ensure compliance. Enabling the VAUX Outputs Upon asserting an AUXEN input, the related output turns-on the internal power switch between the VSTBY supply and its load. The turn-on is slew rate limited and invokes the ICs current regulation feature so as to not droop the supply due to in-rush current loading. Figure 2 illustrates the ISL6113 AUX turn-on performance into a 100 Ω, 150µF load with the in-rush load current being limited to ~1A. . Standby Mode Standby mode is entered when one or more of the MAIN supply inputs (12VIN and/or 3VIN) is absent, below its respective UVLO threshold or OFF. The ISL6113, ISL6114 also has 3.3V auxiliary outputs (VAUX), satisfying an optional PCI Express requirement. These outputs are fed from the VSTBY input pins and controlled by the AUXEN input pins and are independent of the MAIN outputs. Should IC be in standby mode the VAUX switch will function as long as VVSTBY is compliant. Prior to standby mode, ONA and ONB inputs must be deasserted or else the ISL6113, ISL6114 will assert its FAULT outputs. Enabling the MAIN GATE Outputs The related AUXEN must be active for the MAIN supplies to be enabled otherwise they will be latched off. When a slots MAIN supplies are off, the 12VGATE pin is held high with an internal pull-up to the 12VIN voltage. Similarly, the 3VGATE pin is internally held low to GND. With an add-in card properly in place, when an ON_X pin is signaled high, the ISL6113, ISL6114 enables control of one slot turning on one pair of FETs via the 3VGATE and 12VGATE pins. The FET gates are charged with a +25µA (+5µA for the ISL6114) current sink/source pulling the 12VGATE pin to ground and the 3VGATE pin is charged to ~12VIN thereby enhancing both of the MAIN supply FET switches. Estimating In-Rush Current and VOUT Slew Rate at Start-Up The expected in-rush current can be estimated by using Equation 1: With 25µA and 5µA being the GATE pin charge current for FIGURE 2. VAUX TURN-ON RLOAD = 10Ω, CLOAD = 100µF VAUX IAUX AUXEN ISL6113 - I INRUSHNomina lly 25 μA C LOAD C GATE -------------------- ⎝⎠ ⎜⎟ ⎛⎞ = (EQ. 1) ISL6114 - I INRUSHNomina lly 5 μA C LOAD C GATE -------------------- ⎝⎠ ⎜⎟ ⎛⎞ = ISL6113, ISL6114 |
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