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74LVCV2G66DC Scheda tecnica(PDF) 11 Page - NXP Semiconductors |
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74LVCV2G66DC Scheda tecnica(HTML) 11 Page - NXP Semiconductors |
11 / 23 page 74LVCV2G66 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 3 — 16 June 2010 11 of 23 NXP Semiconductors 74LVCV2G66 Overvoltage tolerant bilateral switch 11.2 Additional dynamic characteristics Test data is given in Table 11. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. VEXT = External voltage for measuring switching times. Fig 13. Load circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 11. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 2.3 V to 2.7 V VCC ≤ 2.0ns 30pF 500 Ω open GND 2VCC 2.7V 2.7V ≤ 2.5ns 50pF 500 Ω open GND 6.0 V 3.0V to 3.6V 2.7V ≤ 2.5ns 50pF 500 Ω open GND 6.0 V 4.5 V to 5.5 V VCC ≤ 2.5ns 50pF 500 Ω open GND 2VCC Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb =25 °C. Symbol Parameter Conditions Min Typ Max Unit THD total harmonic distortion fi = 1 kHz; RL =10kΩ; CL =50pF; see Figure 14 VCC = 2.3 V - 0.42 - % VCC = 3.0 V - 0.36 - % VCC = 4.5 V - 0.47 - % fi =10 kHz; RL =10kΩ; CL =50pF; see Figure 14 VCC =2.3 V - 0.11 - % VCC = 3.0 V - 0.07 - % VCC = 4.5 V - 0.01 - % |
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