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FAN4603MM12X Scheda tecnica(PDF) 10 Page - Fairchild Semiconductor |
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FAN4603MM12X Scheda tecnica(HTML) 10 Page - Fairchild Semiconductor |
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10 / 12 page  © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN4603 • Rev. 1.0.1 10 Reducing PFM Output Ripple PFM output ripple amplitude can be reduced by adding external COUT, with negligible impact on efficiency. Reduced output ripple also results in less DC voltage excursion at very light loads. Maximum PFM ripple occurs at no load and is VIN and VOUT proportional. Figure 28. Typical 1.82VOUT No Load PFM Ripple vs. VIN Note: 4. Ripple is less for lower VOUT levels. The effective value of external COUT for a desired ripple amplitude can be determined using: 1 V V 62 V ) V V ( ) F ( C R IN OUT OUT IN . OUT − ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ • • • − = μ (3) where VR is the desired output ripple amplitude in mV and VIN and VOUT are in Volts. The simplified equation above is representative of nominal component values and does not account for device tolerances. The bias level effects associated with case size, voltage rating, and dielectric type of ceramic capacitors should be considered when selecting COUT. Minimum Off-Time Effect on Switching Frequency tOFF(MIN) is 50ns, while tON(MIN) is 35nS This imposes constraints on the maximum/minimum IN OUT V V that the FAN4603 can provide while maintaining a fixed switching frequency in PWM mode. When VIN is LOW, fixed switching is maintained as long as 7 . 0 1 ) ( ≈ • − ≤ SW MIN OFF IN OUT f t V V . When VIN is HIGH, fixed switching is maintained as long as 2 . 0 ) ( ≈ • ≥ SW MIN ON IN OUT f t V V The switching frequency drops when the regulator cannot provide sufficient duty cycle at 6MHz to maintain regulation. Lowering the switching frequency allows VOUT to remain in regulation, even at very low or very high duty cycle. PCB Layout Guideline Figure 29. Recommended PCB Layout FB (pin 5) must be directly connected to VOUT (pin 4). Figure 29 shows the recommended locations of optional CIN and COUT, shown as 0603 size devices. Pad P1, shown in Figure 30 “Land Pattern,” is an optional GND pin. Connection is not required on the PCB. |
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