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ISL12022MAIBZ-T Scheda tecnica(PDF) 7 Page - Intersil Corporation

Il numero della parte ISL12022MAIBZ-T
Spiegazioni elettronici  Low Power RTC with Battery Backed SRAM, Integrated 짹5ppm Temperature Compensation and Auto Daylight Saving
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Produttore elettronici  INTERSIL [Intersil Corporation]
Homepage  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL12022MAIBZ-T Scheda tecnica(HTML) 7 Page - Intersil Corporation

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ISL12022MA
7
FN7575.1
July 9, 2010
tSU:DAT Input Data Setup Time From SDA exiting the 30% to 70%
of VDD window, to SCL rising edge
crossing 30% of VDD.
100
ns
tHD:DAT Input Data Hold Time From SCL falling edge crossing 30%
of VDD to SDA entering the 30% to
70% of VDD window.
20
900
ns
tSU:STO STOP Condition Setup
Time
From SCL rising edge crossing 70%
of VDD, to SDA rising edge crossing
30% of VDD.
600
ns
tHD:STO STOP Condition Hold
Time
From SDA rising edge to SCL falling
edge. Both crossing 70% of VDD.
600
ns
tDH
Output Data Hold Time From SCL falling edge crossing 30%
of VDD, until SDA enters the 30% to
70% of VDD window.
0
ns
tR
SDA and SCL Rise Time From 30% to 70% of VDD.
20 + 0.1 x Cb
300
ns
13, 14
tF
SDA and SCL Fall Time From 70% to 30% of VDD.
20 + 0.1 x Cb
300
ns
13, 14
Cb
Capacitive Loading of
SDA or SCL
Total on-chip and off-chip
10
400
pF
13, 14
RPU
SDA and SCL Bus Pull-
up Resistor Off-chip
Maximum is determined by tR and
tF.
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
1
13, 14
NOTES:
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
8. Specified at +25°C.
9. Temperature Conversion is inactive below VBAT = 2.7V. Device operation is not guaranteed at VBAT <1.8V.
10. IRQ/FOUT inactive.
11. VDD > VBAT +VBATHYS
12. In order to ensure proper timekeeping, the VDD SR- specification must be followed.
13. Limits should be considered typical and are not production tested.
14. These are I2C specific parameters and are not tested, however, they are used to set conditions for testing devices to validate
specification.
15. Minimum VDD and/or VBAT of 1V to sustain the SRAM. The value is based on characterization and it is not tested.
I2C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise
specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 7)
TYP
(Note 8)
MAX
(Note 7) UNITS NOTES


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