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KM62256CLGE-10 Scheda tecnica(PDF) 3 Page - Samsung semiconductor |
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KM62256CLGE-10 Scheda tecnica(HTML) 3 Page - Samsung semiconductor |
3 / 10 page PRELIMINARY Revision 3.0 KM62256C Family CMOS SRAM April 1996 ABSOLUTE MAXIMUM RATINGS* * Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stres s rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not impl ied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Item Symbol Ratings Unit Remark Voltage on any pin relative to Vss VIN,VOUT -0.5 to VCC+0.5 V - Voltage on Vcc supply relative to Vss VCC -0.5 to 7.0 V - Power Dissipation PD 1.0 W - Storage temperature TSTG -65 to 150 ¡É - Operating Temperature TA 0 to 70 ¡É KM62256CL/L-L -25 to 85 ¡É KM62256CLE/LE-L -40 to 85 ¡É KM62256CLI/LI-L Soldering temperature and time TSOLDER 260¡É, 10sec (Lead Only) - - RECOMMENDED DC OPERATING CONDITIONS* * 1) Commercial Product : TA=0 to 70¡É, unless otherwise specified 2) Extended Product : TA=-25 to 85¡É, unless otherwise specified 3) Industrial Product : TA=-40 to 85¡É, unless otherwise specified ** TA=25¡É *** VIL(min)=-3.0V for ¡Â 50ns pulse width Item Symbol Min Typ** Max Unit Supply voltage Vcc 4.5 5.0 5.5 V Ground Vss 0 0 0 V Input high voltage VIH 2.2 - Vcc+0.5V V Input low voltage VIL -0.5*** - 0.8 V CAPACITANCE* (f=1MHz, TA=25¡É) * Capacitance is sampled not 100% tested Item Symbol Test Condition Min Max Unit Input capacitance CIN VIN=0V - 6 pF Input/Output capacitance CIO VIO=0V - 8 pF |
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