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KM416S8030 Scheda tecnica(PDF) 3 Page - Samsung semiconductor |
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KM416S8030 Scheda tecnica(HTML) 3 Page - Samsung semiconductor |
3 / 10 page KM416S8030 CMOS SDRAM REV. 2 Mar. '98 Preliminary ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Unit Voltage on any pin relative to Vss VIN, VOUT -1.0 ~ 4.6 V Voltage on VDD supply relative to Vss VDD, VDDQ -1.0 ~ 4.6 V Storage temperature TSTG -55 ~ +150 °C Power dissipation PD 1 W Short circuit current IOS 50 mA Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. Note : DC OPERATING CONDITIONS Recommended operating conditions (Voltage referenced to VSS = 0V, TA = 0 to 70 °C) Parameter Symbol Min Typ Max Unit Note Supply voltage VDD, VDDQ 3.0 3.3 3.6 V Input logic high votlage VIH 2.0 3.0 VDDQ+0.3 V 1 Input logic low voltage VIL -0.3 0 0.8 V 2 Output logic high voltage VOH 2.4 - - V IOH = -2mA Output logic low voltage VOL - - 0.4 V IOL = 2mA Input leakage current(Inputs) IIL -5 - 5 uA 3 Input leakage current (I/O pins) IIL -5 - 5 uA 3,4 CAPACITANCE (VDD = 3.3V, TA = 23 °C, f = 1MHz, VREF =1.4V ± 200 mV) Parameter Symbol Min Max Unit Clock CCLK 2.5 4 pF RAS, CAS, WE, CS, CKE, DQM CIN 2.5 5 pF Address CADD 2.5 5 pF DQ0 ~ DQ3 COUT 4 6.5 pF 1. VIH (max) = 5.6V AC.The overshoot voltage duration is ≤ 3ns. 2. VIL (min) = -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VDDQ, Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs. 4. Dout is disabled, 0V ≤ VOUT ≤ VDDQ. Note : |
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