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UC1823AJ883B Scheda tecnica(PDF) 8 Page - Texas Instruments

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Il numero della parte UC1823AJ883B
Spiegazioni elettronici  HIGH-SPEED PWM CONTROLLER
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Produttore elettronici  TI [Texas Instruments]
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UC1823AJ883B Scheda tecnica(HTML) 8 Page - Texas Instruments

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UC1823A,UC2823A, UC2823B,
UC3823A,UC3823B,UC1825A,
UC2825A,UC2825B,UC3825A,UC3825B
SLUS334D − AUGUST 1995 − REVISED NOVEMBER 2008
www.ti.com
8
UVLO, SOFT-START AND FAULT MANAGEMENT
Soft-start is programmed by a capacitor on the SS pin. At power up, SS is discharged. When SS is low, the error amplifier
output is also forced low. While the internal 9-
µA source charges the SS pin, the error amplifier output follows until closed
loop regulation takes over.
Anytime ILIM exceeds 1.2 V, the fault latch is set and the output pins are driven low. The soft-start cap is then discharged
by a 250-
µA current sink. No more output pulses are allowed until soft-start is fully discharged and ILIM is below 1.2 V. At
this point the fault latch resets and the chip executes a soft-start.
Should the fault latch get set during soft-start, the outputs are immediately terminated, but the soft-start capacitor does not
discharge until it has been fully charged first. This results in a controlled hiccup interval for continuous fault conditions.
UDG−95106
Figure 5. Soft-Start and Fault Waveforms
ACTIVE LOW OUTPUTS DURING UVLO
The UVLO function forces the outputs to be low and considers both VCC and VREF before allowing the chip to operate.
Figure 6. Output Voltage vs Output Current
UDG−95108
UDG−95106
Figure 7. Output V and I During UVLO


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