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CDCE937 Scheda tecnica(PDF) 4 Page - Texas Instruments

Il numero della parte CDCE937
Spiegazioni elettronici  Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

CDCE937 Scheda tecnica(HTML) 4 Page - Texas Instruments

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CDCE937
CDCEL937
SLAS564F – AUGUST 2007 – REVISED MARCH 2010
www.ti.com
PACKAGE THERMAL RESISTANCE for TSSOP (PW) PACKAGE
(1)
over operating free-air temperature range (unless otherwise noted)
AIRFLOW
TSSOP20
PARAMETER
(lfm)
°C/W
0
89
150
75
TJA
Thermal Resistance Junction to Ambient
200
74
250
74
500
69
TJC
Thermal Resistance Junction to Case
31
TJB
Thermal Resistance Junction to Board
55
RqJT
Thermal Resistance Junction to Top
0.8
RqJB
Thermal Resistance Junction to Bottom
49
(1)
The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board).
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
UNIT
VDD
Device supply voltage
1.7
1.8
1.9
V
Output Yx supply voltage for CDCE937, Vddout
2.3
3.6
VO
Output Yx supply voltage for CDCEL937, Vddout
1.7
1.9
V
VIL
Low-level input voltage LVCMOS
0.3 VDD
V
VIH
High-level input voltage LVCMOS
0.7 VDD
V
VI(thresh)
Input voltage threshold LVCMOS
0.5 VDD
V
Input voltage range S0
0
1.9
VIS
V
Input voltage range S1, S2, SDA, SCL; VI(thresh) = 0.5 VDD
0
3.6
VI(CLK)
Input voltage range CLK
0
1.9
V
Output current (Vddout = 3.3 V)
±12
IOH /IOL
Output current (Vddout = 2.5 V)
±10
mA
Output current (Vddout = 1.8 V)
±8
CL
Output load LVCMOS
10
pF
TA
Operating free-air temperature
–40
85
°C
RECOMMENDED CRYSTAL/VCXO SPECIFICATIONS
(1)
MIN
NOM
MAX
UNIT
fXtal
Crystal input frequency range (fundamental mode)
8
27
32
MHz
ESR
Effective series resistance
100
fPR
Pulling range (0 V
≤ Vctrl ≤ 1.8 V)(2)
±120
±150
ppm
Frequency control voltage, Vctrl
0
VDD
V
C0/C1
Pullability ratio
220
CL
On-chip load capacitance at Xin and Xout
0
20
pF
(1)
For more information about VCXO configuration, and crystal recommendation, see application report (SCAA085).
(2)
Pulling range depends on crystal-type, on-chip crystal load capacitance and PCB stray capacitance; pulling range of min ±120 ppm
applies for crystal listed in the application report (SCAA085).
EEPROM SPECIFICATION
MIN
TYP
MAX
UNIT
EEcyc
Programming cycles of EEPROM
1000
cycles
EEret
Data retention
10
years
4
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Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): CDCE937 CDCEL937


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