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74LVC1G3157DRLRG4 Scheda tecnica(PDF) 3 Page - Texas Instruments |
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74LVC1G3157DRLRG4 Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 23 page www.ti.com Recommended Operating Conditions (1) Electrical Characteristics SN74LVC1G3157 SINGLE-POLE, DOUBLE-THROW ANALOG SWITCH SCES424F – JANUARY 2003 – REVISED FEBRUARY 2007 MIN MAX UNIT VCC 1.65 5.5 V VI/O 0 VCC V VIN 0 5.5 V VCC = 1.65 V to 1.95 V VCC × 0.75 VIH High-level input voltage, control input V VCC = 2.3 V to 5.5 V VCC × 0.7 VCC = 1.65 V to 1.95 V VCC × 0.25 VIL Low-level input voltage, control input V VCC = 2.3 V to 5.5 V VCC × 0.3 VCC = 1.65 V to 1.95 V 20 VCC = 2.3 V to 2.7 V 20 ∆t/∆v Input transition rise or fall rate ns/V VCC = 3 V to 3.6 V 10 VCC = 4.5 V to 5.5 V 10 TA Operating free-air temperature –40 85 °C (1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN TYP(1) MAX UNIT VI = 0 V IO = 4 mA 11 20 1.65 V VI = 1.65 V IO = –4 mA 15 50 VI = 0 V IO = 8 mA 8 12 2.3 V VI = 2.3 V IO = –8 mA 11 30 See Figure 1 and ron On-state switch resistance(2) VI = 0 V IO = 24 mA 7 9 Ω Figure 2 3 V VI = 3 V IO = –24 mA 9 20 VI = 0 V IO = 30 mA 6 7 VI = 2.4 V IO = –30 mA 4.5 V 7 12 VI = 4.5 V IO = –30 mA 7 15 IA = –4 mA 1.65 V 140 IA = –8 mA 2.3 V 45 On-state switch resistance 0 ≤ V Bn ≤ VCC rrange Ω over signal range(2)(3) (see Figure 1 and Figure 2) IA = –24 mA 3 V 18 IA = –30 mA 4.5 V 10 VBn = 1.15 IA = –4 mA 1.65 V 0.5 V Difference of on-state VBn = 1.6 V IA = –8 mA 2.3 V 0.1 ∆r on resistance between See Figure 1 Ω VBn = 2.1 V IA = –24 mA 3 V 0.1 switches(2)(4)(5) VBn = 3.15 IA = –30 mA 4.5 V 0.1 V IA = –4 mA 1.65 V 110 IA = –8 mA 2.3 V 26 ron(flat) ON resistance flatness(2)(4)(6) 0 ≤ V Bn ≤ VCC Ω IA = –24 mA 3 V 9 IA = –30 mA 4.5 V 4 (1) TA = 25°C (2) Measured by the voltage drop between I/O pins at the indicated current through the switch. ON resistance is determined by the lower of the voltages on the two (A or B) ports. (3) Specified by design (4) ∆r on = ron(max) – ron(min) measured at identical VCC, temperature, and voltage levels (5) This parameter is characterized, but not tested in production. (6) Flatness is defined as the difference between the maximum and minimum values of ON resistance over the specified range of conditions. 3 Submit Documentation Feedback |
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