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SN74AUP1G240DCKR Scheda tecnica(PDF) 3 Page - Texas Instruments |
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SN74AUP1G240DCKR Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 21 page SN74AUP1G240 www.ti.com SCES627C – MARCH 2005 – REVISED MAY 2010 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 4.6 V VI Input voltage range(2) –0.5 4.6 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 4.6 V VO Output voltage range in the high or low state(2) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±20 mA Continuous current through VCC or GND ±50 mA DBV package 206 DCK package 252 qJA Package thermal impedance(3) DSF package 300 °C/W DRY package 234 YFP/YZP package 132 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) MIN MAX UNIT VCC Supply voltage 0.8 3.6 V VCC = 0.8 V VCC 3.6 VCC = 1.1 V to 1.95 V 0.65 × VCC 3.6 VIH High-level input voltage V VCC = 2.3 V to 2.7 V 1.6 3.6 VCC = 3 V to 3.6 V 2 3.6 VCC = 0.8 V 0 VCC = 1.1 V to 1.95 V 0 0.35 × VCC VIL Low-level input voltage V VCC = 2.3 V to 2.7 V 0 0.7 VCC = 3 V to 3.6 V 0 0.9 Active state 0 VCC VO Output voltage V 3-state 0 3.6 Δt/Δv Input transition rise or fall rate VCC = 0.8 V to 3.6 V 200 ns/V TA Operating free-air temperature –40 85 °C (1) The A data input pins may be floated if the OE is high and the outputs are disabled; otherwise, all unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): SN74AUP1G240 |
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