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SN74AUC1G32DRLR Scheda tecnica(PDF) 2 Page - Texas Instruments

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Il numero della parte SN74AUC1G32DRLR
Spiegazioni elettronici  SINGLE 2-INPUT POSITIVE-OR GATE
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74AUC1G32DRLR Scheda tecnica(HTML) 2 Page - Texas Instruments

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Absolute Maximum Ratings
(1)
SN74AUC1G32
SCES377O – SEPTEMBER 2001 – REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
NanoFree™ – WCSP (DSBGA)
Reel of 3000
SN74AUC1G32YZPR
_ _ _UG_
0.23-mm Large Bump – YZP (Pb-free)
SON – DRY
Reel of 5000
SN74AUC1G32DRYR
PREVIEW
–40°C to 85°C
SOT (SOT-23) – DBV
Reel of 3000
SN74AUC1G32DBVR
U32_
SOT (SC-70) – DCK
Reel of 3000
SN74AUC1G32DCKR
UG_
SOT (SOT-553) – DRL
Reel of 4000
SN74AUC1G32DRLR
UG_
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
H
X
H
X
H
H
L
L
L
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
3.6
V
VI
Input voltage range(2)
–0.5
3.6
V
VO
Voltage range applied to any output in the high impedance or power-off state(2)
–0.5
3.6
V
VO
Output voltage range(2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
Continuous current through VCC or GND
±100
mA
DBV package
206
DCK package
252
θ
JA
Package thermal impedance(3)
DRL package
142
°C/W
DRY package
234
YZP package
132
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
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