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CS4354 Scheda tecnica(PDF) 11 Page - Cirrus Logic |
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CS4354 Scheda tecnica(HTML) 11 Page - Cirrus Logic |
11 / 25 page DS895A2 11 CS4354 DC ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise specified): VA = 5 V, VL = 3.3 V; GND = 0 V; SDIN = 0; all voltages with respect to ground. Notes: 15. Power supply current increases with increasing sample rate and increasing MCLK frequency. Typical values are based on Fs = 48 kHz and MCLK = 12.288 MHz. Maximum values are based on highest sample rate and highest MCLK frequency; see Switching Specifications - Serial Audio Interface. Vari- ance between speed modes is small. 16. During normal operation, SDIN = 997 Hz sine wave at 0 dBFS with load resistance RL = 3 k. 17. Power-down is defined as all clock and data lines held static low. All digital inputs have a weak pull- down (approximately 50 k ) which is only present during power on reset. Opposing this pull-down will increase the power-down current. 18. Valid with the recommended capacitor values as shown in the typical connection diagram in Section 5. 2.1 Digital I/O Pin Characteristics Input and output levels and associated power supply voltage are shown in Table 2. Logic levels should not exceed the corresponding power supply voltage. Table 2. Digital I/O Pin Characteristics Parameters Symbol Min Typ Max Units Power Supplies Power Supply Current (Note 15) Normal Operation (Note 16) Power-Down (Note 17) IVA IVL IVA IVL - - - - 10 0.1 0.5 1 13 0.2 - - mA mA mA A Power Dissipation (All Supplies) Normal Operation (Note 16) (Note 15) Power-Down (Note 17) - - 50 2.5 65 - mW mW Power Supply Rejection Ratio (Note 18) (1 kHz) (60 Hz) PSRR - - 60 60 - - dB dB DC Output Voltages Pin Voltage FILT+ to GND FLYP to FLYN GND to -VFILT - - - 3.5 4.9 4.7 - - - V V V Pin Name Power Supply I/O Driver Receiver MCLK VL Input - 1.8 V - 5 V LRCK VL Input - 1.8 V - 5 V SCLK VL Input - 1.8 V - 5 V SDIN VL Input - 1.8 V - 5 V |
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