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74LVTN16244BDGG Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
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74LVTN16244BDGG Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
9 / 16 page 74LVTN16244B_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 23 March 2010 9 of 16 NXP Semiconductors 74LVTN16244B 3.3 V 16-bit buffer/driver; 3-state 11. Waveforms Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Propagation delay input (nAn) to output (nYn) mna171 nAn input nYn output tPLH tPHL GND VI VM VM VM VM VOH VOL Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. 3-state output enable and disable times 001aae464 tPZL nYn output nYn output nOE input VOL VOH 3.0 V VI VM GND 0 V tPLZ tPZH tPHZ VX VY VM VM Table 8. Measurement points Input Output VM VM VX VY 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V |
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