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74LVC2G53GT Scheda tecnica(PDF) 1 Page - NXP Semiconductors |
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74LVC2G53GT Scheda tecnica(HTML) 1 Page - NXP Semiconductors |
1 / 23 page 1. General description The 74LVC2G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC2G53 provides one analog multiplexer/demultiplexer with a digital select input (S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an active LOW enable input (E). When pin E is HIGH, the switch is turned off. Schmitt-trigger action at the select and enable inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 1.65 V to 5.5 V. 2. Features I Wide supply voltage range from 1.65 V to 5.5 V I Very low ON resistance: N 7.5 Ω (typical) at VCC = 2.7 V N 6.5 Ω (typical) at VCC = 3.3 V N 6 Ω (typical) at VCC =5V I Switch current capability of 32 mA I High noise immunity I CMOS low-power consumption I TTL interface compatibility at 3.3 V I Latch-up performance meets requirements of JESD 78 Class I I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Control inputs accepts voltages up to 5 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 74LVC2G53 2-channel analog multiplexer/demultiplexer Rev. 05 — 18 June 2008 Product data sheet |
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